Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Add support for RM2 with STM32F (429, 746) #3086

Open
wants to merge 1 commit into
base: master
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
11 changes: 6 additions & 5 deletions mongoose.c
Original file line number Diff line number Diff line change
Expand Up @@ -19795,7 +19795,7 @@ static size_t cmsis_rx(void *buf, size_t buflen, struct mg_tcpip_if *ifp) {
static struct mg_tcpip_if *s_ifp;
static bool s_link, s_auth, s_join;

static bool cyw_init(struct mg_tcpip_driver_cyw_firmware *fw, uint8_t *mac);
static bool cyw_init(uint8_t *mac);
static void cyw_poll(void);

static bool mg_tcpip_driver_cyw_init(struct mg_tcpip_if *ifp) {
Expand All @@ -19807,7 +19807,7 @@ static bool mg_tcpip_driver_cyw_init(struct mg_tcpip_if *ifp) {
}
s_ifp = ifp;
s_link = s_auth = s_join = false;
if (!cyw_init(d->fw, ifp->mac)) return false;
if (!cyw_init(ifp->mac)) return false;

if (d->apmode) {
MG_DEBUG(("Starting AP '%s' (%u)", d->apssid, d->apchannel));
Expand Down Expand Up @@ -20511,7 +20511,7 @@ static const uint32_t country_code = 'X' + ('X' << 8) + (0 << 16);
static bool cyw_spi_init();

// clang-format off
static bool cyw_init(struct mg_tcpip_driver_cyw_firmware *fw, uint8_t *mac) {
static bool cyw_init(uint8_t *mac) {
uint32_t val = 0;
if (!cyw_spi_init()) return false; // BUS DEPENDENCY
// BT-ENABLED DEPENDENCY
Expand Down Expand Up @@ -20798,12 +20798,13 @@ static bool cyw_spi_init() {
if (times == ~0) return false;
// DS 4.2.3 Table 6. Chip starts in 16-bit little-endian mode.
// Configure SPI and switch to 32-bit big-endian mode:
// - High-speed mode
// - High-speed mode: d->hs true
// - IRQ POLARITY high
// - SPI RESPONSE DELAY 4 bytes time [not in DS] TODO(scaprile): logic ana
// - Status not sent after command, IRQ with status
val = sw16_2(0x000204b3); // 4 reg content
val = sw16_2(0x000204a3 | (d->hs ? MG_BIT(4) : 0)); // 4 reg content
cyw_spi_write(CYW_SD_FUNC_BUS | CYW_SD_16bMODE, CYW_BUS_SPI_BUSCTRL, &val, sizeof(val));
mg_tcpip_call(s_ifp, MG_TCPIP_EV_DRIVER, NULL);
cyw_spi_read(CYW_SD_FUNC_BUS, CYW_BUS_SPI_TEST, &val, sizeof(val));
if (val != 0xFEEDBEAD) return false;
val = 4; cyw_spi_write(CYW_SD_FUNC_BUS, CYW_BUS_SPI_RESPDLY_F1, &val, 1);
Expand Down
8 changes: 5 additions & 3 deletions mongoose.h
Original file line number Diff line number Diff line change
Expand Up @@ -2807,6 +2807,7 @@ enum {
MG_TCPIP_EV_WIFI_SCAN_RESULT, // Wi-Fi scan results struct mg_wifi_scan_bss_data *
MG_TCPIP_EV_WIFI_SCAN_END, // Wi-Fi scan has finished NULL
MG_TCPIP_EV_WIFI_CONNECT_ERR, // Wi-Fi connect has failed driver and chip specific
MG_TCPIP_EV_DRIVER, // Driver event driver specific
MG_TCPIP_EV_USER // Starting ID for user events
};

Expand Down Expand Up @@ -2974,11 +2975,11 @@ struct mg_tcpip_spi_ {
};

struct mg_tcpip_driver_cyw_firmware {
const uint8_t * code_addr;
const uint8_t *code_addr;
size_t code_len;
const uint8_t * nvram_addr;
const uint8_t *nvram_addr;
size_t nvram_len;
const uint8_t * clm_addr;
const uint8_t *clm_addr;
size_t clm_len;
};

Expand All @@ -2993,6 +2994,7 @@ struct mg_tcpip_driver_cyw_data {
uint8_t apsecurity; // TBD
uint8_t apchannel;
bool apmode; // start in AP mode; 'false' starts connection to 'ssid' if not NULL
bool hs; // use chip "high-speed" mode; otherwise SPI CPOL0 CPHA0 (DS 4.2.3 Table 6)
};

//#define MG_TCPIP_DRIVER_INIT(mgr) \
Expand Down
11 changes: 6 additions & 5 deletions src/drivers/cyw.c
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@
static struct mg_tcpip_if *s_ifp;
static bool s_link, s_auth, s_join;

static bool cyw_init(struct mg_tcpip_driver_cyw_firmware *fw, uint8_t *mac);
static bool cyw_init(uint8_t *mac);
static void cyw_poll(void);

static bool mg_tcpip_driver_cyw_init(struct mg_tcpip_if *ifp) {
Expand All @@ -19,7 +19,7 @@ static bool mg_tcpip_driver_cyw_init(struct mg_tcpip_if *ifp) {
}
s_ifp = ifp;
s_link = s_auth = s_join = false;
if (!cyw_init(d->fw, ifp->mac)) return false;
if (!cyw_init(ifp->mac)) return false;

if (d->apmode) {
MG_DEBUG(("Starting AP '%s' (%u)", d->apssid, d->apchannel));
Expand Down Expand Up @@ -723,7 +723,7 @@ static const uint32_t country_code = 'X' + ('X' << 8) + (0 << 16);
static bool cyw_spi_init();

// clang-format off
static bool cyw_init(struct mg_tcpip_driver_cyw_firmware *fw, uint8_t *mac) {
static bool cyw_init(uint8_t *mac) {
uint32_t val = 0;
if (!cyw_spi_init()) return false; // BUS DEPENDENCY
// BT-ENABLED DEPENDENCY
Expand Down Expand Up @@ -1010,12 +1010,13 @@ static bool cyw_spi_init() {
if (times == ~0) return false;
// DS 4.2.3 Table 6. Chip starts in 16-bit little-endian mode.
// Configure SPI and switch to 32-bit big-endian mode:
// - High-speed mode
// - High-speed mode: d->hs true
// - IRQ POLARITY high
// - SPI RESPONSE DELAY 4 bytes time [not in DS] TODO(scaprile): logic ana
// - Status not sent after command, IRQ with status
val = sw16_2(0x000204b3); // 4 reg content
val = sw16_2(0x000204a3 | (d->hs ? MG_BIT(4) : 0)); // 4 reg content
cyw_spi_write(CYW_SD_FUNC_BUS | CYW_SD_16bMODE, CYW_BUS_SPI_BUSCTRL, &val, sizeof(val));
mg_tcpip_call(s_ifp, MG_TCPIP_EV_DRIVER, NULL);
cyw_spi_read(CYW_SD_FUNC_BUS, CYW_BUS_SPI_TEST, &val, sizeof(val));
if (val != 0xFEEDBEAD) return false;
val = 4; cyw_spi_write(CYW_SD_FUNC_BUS, CYW_BUS_SPI_RESPDLY_F1, &val, 1);
Expand Down
7 changes: 4 additions & 3 deletions src/drivers/cyw.h
Original file line number Diff line number Diff line change
Expand Up @@ -11,11 +11,11 @@ struct mg_tcpip_spi_ {
};

struct mg_tcpip_driver_cyw_firmware {
const uint8_t * code_addr;
const uint8_t *code_addr;
size_t code_len;
const uint8_t * nvram_addr;
const uint8_t *nvram_addr;
size_t nvram_len;
const uint8_t * clm_addr;
const uint8_t *clm_addr;
size_t clm_len;
};

Expand All @@ -30,6 +30,7 @@ struct mg_tcpip_driver_cyw_data {
uint8_t apsecurity; // TBD
uint8_t apchannel;
bool apmode; // start in AP mode; 'false' starts connection to 'ssid' if not NULL
bool hs; // use chip "high-speed" mode; otherwise SPI CPOL0 CPHA0 (DS 4.2.3 Table 6)
};

//#define MG_TCPIP_DRIVER_INIT(mgr) \
Expand Down
1 change: 1 addition & 0 deletions src/net_builtin.h
Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,7 @@ enum {
MG_TCPIP_EV_WIFI_SCAN_RESULT, // Wi-Fi scan results struct mg_wifi_scan_bss_data *
MG_TCPIP_EV_WIFI_SCAN_END, // Wi-Fi scan has finished NULL
MG_TCPIP_EV_WIFI_CONNECT_ERR, // Wi-Fi connect has failed driver and chip specific
MG_TCPIP_EV_DRIVER, // Driver event driver specific
MG_TCPIP_EV_USER // Starting ID for user events
};

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -112,7 +112,7 @@ static void mif_fn(struct mg_tcpip_if *ifp, int ev, void *ev_data) {


static struct mg_tcpip_driver_cyw_data d = {
(struct mg_tcpip_spi_ *)&spi, (struct mg_tcpip_driver_cyw_firmware *)&fw, WIFI_SSID, WIFI_PASS, "mongoose", "mongoose", 0, 0, 10, true};
(struct mg_tcpip_spi_ *)&spi, (struct mg_tcpip_driver_cyw_firmware *)&fw, WIFI_SSID, WIFI_PASS, "mongoose", "mongoose", 0, 0, 10, true, true};

int main(void) {
// initialize stdio
Expand Down
41 changes: 41 additions & 0 deletions tutorials/stm32/rm2-nucleo-f429zi-make-baremetal-builtin/Makefile
Original file line number Diff line number Diff line change
@@ -0,0 +1,41 @@
CFLAGS = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion
CFLAGS += -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion
CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_mcu/Include
CFLAGS += -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 $(CFLAGS_EXTRA)
LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,[email protected]

SOURCES = main.c syscalls.c sysinit.c
SOURCES += cmsis_mcu/Source/Templates/gcc/startup_stm32f429xx.s # ST startup file. Compiler-dependent!

CFLAGS += -Wno-comment

# Mongoose options are defined in mongoose_config.h
SOURCES += mongoose.c

RM = rm -rf
ifeq ($(OS),Windows_NT)
RM = cmd /C del /Q /F /S
endif

all build example: firmware.bin

firmware.bin: firmware.elf
arm-none-eabi-objcopy -O binary $< $@

firmware.elf: cmsis_core cmsis_mcu pico-sdk $(SOURCES) hal.h link.ld Makefile
arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(LDFLAGS) -o $@

flash: firmware.bin
st-flash --reset write $< 0x8000000

cmsis_core: # ARM CMSIS core headers
git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
cmsis_mcu: # Keil CMSIS headers and drivers for STM32F4 series (CMSIS-pack)
git clone --depth 1 -b v2.6.9 https://github.com/STMicroelectronics/cmsis_device_f4 $@

pico-sdk:
git clone --depth 1 --no-checkout -b 2.1.0 https://github.com/raspberrypi/pico-sdk $@ && cd $@ && git sparse-checkout set lib/cyw43-driver && git checkout && git submodule update --init lib/cyw43-driver

clean:
$(RM) firmware.* *.su cmsis_core cmsis_mcu* pico-sdk
20 changes: 20 additions & 0 deletions tutorials/stm32/rm2-nucleo-f429zi-make-baremetal-builtin/README.md
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@

# RM2 with a NUCLEO-F429ZI

The RM2 is a breakout containing the Wi-Fi subsection of a Raspberry Pi Pico W (or Pico 2 W), that is, a CYW43439, related circuitry, and antenna.

Connect both modules as pin definitions in hal.h suggest, **keep short wires**


| Signal | GPIO | CN7 pin | | RM2 pin | RM2 signal |
|---------|------|---------|-------------|---------|------------|
| DATAPIN | PB5 | 13 | ───┐─────── | 9 | DAT |
| MISOPIN | PB4 | 19 | ───┘ | | |
| CLKPIN | PB3 | 15 | ─────────── | 8 | CLK |
| CSPIN | PA4 | 17 | ─────────── | 10 | CS |
| PWRPIN | PC7 | 11 | ─────────── | 11 | WL ON |

| Signal | GPIO | CN8 pin | | RM2 pin | RM2 signal |
|---------|------|---------|-------------|---------|------------|
| +3V3 | | 7 | ─────────── | 12 | 3V3 |
| GND | | 11 | ─────────── | 7 | (-) |
Loading
Loading