[Deepin-Kernel-SIG] [linux 6.18-y] rebase our patches and fix builds -part3

.github/workflows/package-kernel-amd64-daily.yml

@@ -26,9 +26,10 @@ jobs:
           # .config
           make deepin_x86_desktop_defconfig
           make bindeb-pkg -j$(nproc)
+          mv ../*.deb .
 
       - name: 'Upload Kernel Artifact'
         uses: actions/upload-artifact@v3
         with:
           name: kernel-amd64-deb
-          path: "../*.deb"
+          path: "*.deb"

Documentation/devicetree/bindings/gpio/phytium,sgpio.yaml

@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/phytium,sgpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Phytium SGPIO controller
+
+description: |
+  This SGPIO controller is for Phytium Pe220x SoCs, which supports up to
+  96 (32x3) Serial GPIOs.
+
+maintainers:
+  - Chen Baozi <[email protected]>
+
+properties:
+  compatible:
+    const: phytium,sgpio
+
+  reg:
+    maxItems: 1
+    description: Address and length of the register set for the device.
+
+  gpio-controller: true
+
+  '#gpio-cells':
+    const: 2
+    description: |
+      The first cell is the pin number and the second cell is used to specify
+      the gpio polarity.
+        0 = active high
+        1 = active low
+
+  interrupts:
+    maxItems: 1
+
+  ngpios: true
+
+  bus-frequency: true
+
+  clocks:
+    maxItems: 1
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - gpio-controller
+  - '#gpio-cells'
+  - interrupts
+  - ngpios
+  - clocks
+  - bus-frequency
+
+examples:
+  - |
+    sgpio: sgpio@2807d000 {
+      compatible = "phytium,sgpio";
+      reg = <0x0 0x2807d000 0x0 0x1000>;
+      interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+      clocks = <&sysclk_48mhz>;
+      ngpios = <96>;
+      bus-frequency = <48000>;
+      gpio-controller;
+      #gpio-cells = <2>;
+    };

Documentation/devicetree/bindings/gpu/phytium,dc.yaml

@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/phytium,dc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Phytium Display Controller
+
+maintainers:
+  - Dai Jingtao <[email protected]>
+
+properties:
+  compatible:
+    enum:
+      - phytium,dc
+
+  reg:
+    items:
+      - description: DC registers
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+examples:
+  - |
+    dc@32000000 {
+        compatible = "phytium,dc";
+        reg = <0x0 0x32000000 0x0 0x8000>;
+        interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+    };

Documentation/devicetree/bindings/i3c/cdns,i3c-master.yaml

@@ -15,7 +15,9 @@ allOf:
 properties:
   compatible:
     oneOf:
-      - const: cdns,i3c-master
+      - enum:
+          - cdns,i3c-master
+          - phytium,cdns-i3c-master
       - items:
           - enum:
               - axiado,ax3000-i3c

Documentation/devicetree/bindings/i3c/phytium,i3c-master.yaml

@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+
+* Phytium I3C controller
+
+This I3C controller is for Phytium Soc.
+
+Required properties:
+- compatible: Shall be "phytium,cdns-i3c-master"
+- clocks: Shall reference the pclk and sysclk
+- clock-names: Shall contain "pclk" and "sysclk"
+- interrupts: The interrupt line connected to this I3C master
+- reg: I3C master registers
+- #address-cells: Shall be set to 1
+- #size-cells: Shall be set to 0
+- i2c-scl-hz: I2C CLK frequency
+- i3c-scl-hz: I3C CLK frequency
+
+Example:
+
+	i3c-master@28045000 {
+		compatible = "phytium,cdns-i3c-master";
+		reg = <0x0 0x28045000 0x0 0x1000>;
+		interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&coreclock>, <&i3csysclock>;
+		clock-names = "pclk", "sysclk";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		i2c-scl-hz = <400000>;
+		i3c-scl-hz = <1000000>;
+
+		nunchuk: nunchuk@52 {
+			compatible = "nintendo,nunchuk";
+			reg = <0x52 0x0 0x10>;
+		};
+	};

Documentation/devicetree/bindings/leds/phytnet_led.yaml

@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/phytnet_led.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Phytium mac led controller
+
+maintainers:
+  - LongShixiang <[email protected]>
+
+description:
+  This modules is used to control mac led.
+
+properties:
+  compatible:
+    const: phytium,net_led
+  net_dev:
+    maxItems: 1
+    description: Phandler of specified Net device
+  led-gpios:
+    minItems: 1
+    maxItems: 2
+    description: |-
+      the gpios used for led control based on net_dev condition.
+      One represents LINK condition, another represents ACT condition.
+
+required:
+  - compatible
+  - net_dev
+  - led-gpios
+
+examples:
+  - |
+    gpiochip0: gpop_controller{
+            ...
+    }
+    eth0: ethernet{
+            ...
+    }
+    phytium_net_led0 {
+      compatible = "phytium,net_led";
+      net_dev = <&eth1>;
+      led-gpios = <&gpiochip0 9 GPIO_ACTIVE_HIGH>,  /* link */
+                  <&gpiochip0 11 GPIO_ACTIVE_HIGH>; /* act */
+    };

Documentation/devicetree/bindings/net/cdns,macb.yaml

@@ -59,6 +59,8 @@ properties:
           - cdns,emac                 # Generic
           - cdns,gem                  # Generic
           - cdns,macb                 # Generic
+	  - cdns,phytium-gem-1.0    # GEM version 1.0 on Phytium SoCs
+	  - cdns,phytium-gem-2.0    # GEM version 2.0 on Phytium SoCs
 
       - items:
           - enum:

Documentation/devicetree/bindings/usb/phytium,usb2.yaml

@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/phytium,usb2.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Phytium USBHS-DRD controller bindings
+
+maintainers:
+  - Chen Baozi <[email protected]>
+
+properties:
+  compatible:
+    const: phytium,usb2
+
+  reg:
+    items:
+      - description: USB controller registers
+      - description: PHY registers
+
+  interrupts:
+    maxItems: 1
+
+  dr_mode:
+    enum: [host, otg, peripheral]
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    usb2_0: usb2@31800000 {
+      compatible = "phytium,usb2";
+      reg = <0x0 0x31800000 0x0 0x80000>,
+            <0x0 0x31990000 0x0 0x10000>;
+      interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+    };

Makefile

@@ -1245,11 +1245,8 @@ vmlinux: vmlinux.o $(KBUILD_LDS) modpost
 # make sure no implicit rule kicks in
 $(sort $(KBUILD_LDS) $(KBUILD_VMLINUX_OBJS) $(KBUILD_VMLINUX_LIBS)): . ;
 
-ifeq ($(origin KERNELRELEASE),file)
-filechk_kernel.release = $(srctree)/scripts/setlocalversion $(srctree)
-else
-filechk_kernel.release = echo $(KERNELRELEASE)
-endif
+filechk_kernel.release = \
+	echo "$$($(CONFIG_SHELL) $(srctree)/scripts/setlocalversion $(srctree))"
 
 # Store (new) KERNELRELEASE string in include/config/kernel.release
 include/config/kernel.release: FORCE

arch/arm64/Kconfig.platforms

@@ -313,6 +313,7 @@ config ARCH_PENSANDO
 
 config ARCH_PHYTIUM
 	bool "Phytium SoC Family"
+	select ARM_GIC_PHYTIUM_2500
 	help
 	  This enables support for Phytium ARMv8 SoC family, including:
 	   - Phytium Server SoC Family