[Deepin-Kernel-SIG] [linux 6.6-y] [CIX] Apply support for CIX

arch/arm64/configs/deepin_arm64_desktop_defconfig

@@ -2193,6 +2193,7 @@ CONFIG_I2C_SCMI=m
 CONFIG_I2C_ALTERA=m
 CONFIG_I2C_BCM2835=m
 CONFIG_I2C_CADENCE=m
+CONFIG_I2C_CIX=m
 CONFIG_I2C_CBUS_GPIO=m
 CONFIG_I2C_DESIGNWARE_SLAVE=y
 CONFIG_I2C_DESIGNWARE_PCI=m
@@ -2883,7 +2884,6 @@ CONFIG_DVB_FIREDTV=m
 CONFIG_PANEL=m
 CONFIG_DRM=y
 CONFIG_DRM_LOAD_EDID_FIRMWARE=y
-CONFIG_DRM_DP_AUX_CHARDEV=y
 CONFIG_DRM_DP_CEC=y
 CONFIG_DRM_I2C_NXP_TDA998X=m
 CONFIG_DRM_I2C_NXP_TDA9950=m
@@ -3064,6 +3064,12 @@ CONFIG_DRM_SSD130X_I2C=m
 CONFIG_DRM_SSD130X_SPI=m
 CONFIG_DRM_SPRD=m
 CONFIG_DRM_PHYTIUM=m
+CONFIG_DRM_CIX=m
+CONFIG_DRM_LINLONDP=m
+CONFIG_DRM_TRILIN_DP_CIX=m
+CONFIG_DRM_CIX_EDP_PANEL=m
+CONFIG_DRM_TRILIN_DPSUB=m
+CONFIG_DRM_TRILIN_CADENCE_PHY=m
 CONFIG_FB=m
 CONFIG_FB_TILEBLITTING=y
 CONFIG_BACKLIGHT_PWM=m
@@ -3186,6 +3192,11 @@ CONFIG_SND_SOC_AMD_ACP=m
 CONFIG_SND_SOC_AMD_CZ_DA7219MX98357_MACH=m
 CONFIG_SND_SOC_AMD_CZ_RT5645_MACH=m
 CONFIG_SND_ATMEL_SOC=m
+CONFIG_SND_SOC_CIX=m
+CONFIG_SND_SOC_CDNS_I2S_SC_CIX=m
+CONFIG_SND_SOC_CDNS_I2S_MC_CIX=m
+CONFIG_SND_SOC_IPBLOQ_HDA_CIX=m
+CONFIG_SND_HDACODEC_REALTEK_CIX=m
 CONFIG_SND_DESIGNWARE_I2S=m
 CONFIG_SND_DESIGNWARE_PCM=y
 CONFIG_SND_SOC_FSL_ASRC=m
@@ -3460,6 +3471,10 @@ CONFIG_USB_MICROTEK=m
 CONFIG_USBIP_CORE=m
 CONFIG_USBIP_VHCI_HCD=m
 CONFIG_USBIP_HOST=m
+CONFIG_USB_CDNS_SUPPORT=m
+CONFIG_USB_CDNSP_CIX=y
+CONFIG_USB_CDNSP_PCI=m
+CONFIG_USB_CDNSP_SKY1=m
 CONFIG_USB_MUSB_HDRC=m
 CONFIG_USB_MUSB_HOST=y
 CONFIG_MUSB_PIO_ONLY=y
@@ -3570,6 +3585,7 @@ CONFIG_TYPEC_RT1719=m
 CONFIG_TYPEC_HD3SS3220=m
 CONFIG_TYPEC_STUSB160X=m
 CONFIG_TYPEC_WUSB3801=m
+CONFIG_TYPEC_RTS5453=m
 CONFIG_TYPEC_MUX_PI3USB30532=m
 CONFIG_TYPEC_DP_ALTMODE=m
 CONFIG_MMC=m
@@ -3743,6 +3759,7 @@ CONFIG_XILINX_XDMA=m
 CONFIG_XILINX_ZYNQMP_DMA=m
 CONFIG_XILINX_ZYNQMP_DPDMA=m
 CONFIG_PHYTIUM_DDMA=y
+CONFIG_ARM_DMA350=m
 CONFIG_MTK_HSDMA=m
 CONFIG_MTK_CQDMA=m
 CONFIG_MTK_UART_APDMA=m
@@ -3824,12 +3841,14 @@ CONFIG_COMMON_CLK_CDCE706=m
 CONFIG_COMMON_CLK_CDCE925=m
 # CONFIG_COMMON_CLK_XGENE is not set
 CONFIG_COMMON_CLK_PWM=m
+CONFIG_COMMON_CLK_CIX=m
 CONFIG_HWSPINLOCK=y
 CONFIG_HWSPINLOCK_OMAP=m
 CONFIG_HWSPINLOCK_PHYTIUM=m
 CONFIG_HWSPINLOCK_QCOM=m
 CONFIG_HWSPINLOCK_SPRD=m
 CONFIG_HWSPINLOCK_SUN6I=m
+CONFIG_TIMER_SKY1_GPT=y
 CONFIG_ARM_MHU=y
 CONFIG_ARM_MHU_V2=m
 CONFIG_IMX_MBOX=m
@@ -3854,7 +3873,12 @@ CONFIG_IOMMU_IO_PGTABLE_ARMV7S=y
 CONFIG_IOMMU_DEFAULT_PASSTHROUGH=y
 CONFIG_ARM_SMMU=y
 CONFIG_ARM_SMMU_V3=y
+CONFIG_REMOTEPROC=y
+CONFIG_CIX_DSP_REMOTEPROC=m
 CONFIG_RPMSG_VIRTIO=m
+CONFIG_SOC_CIX=y
+CONFIG_CIX_SKY1_SOCINFO=y
+CONFIG_CIX_SOC_ACPI=y
 CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
 CONFIG_DEVFREQ_GOV_PERFORMANCE=m
 CONFIG_DEVFREQ_GOV_POWERSAVE=m
@@ -3895,6 +3919,8 @@ CONFIG_IPACK_BUS=m
 CONFIG_BOARD_TPCI200=m
 CONFIG_SERIAL_IPOCTAL=m
 # CONFIG_RESET_MCHP_SPARX5 is not set
+CONFIG_RESET_SKY1=m
+CONFIG_RESET_SKY1_AUDSS=m
 CONFIG_BCM_KONA_USB2_PHY=m
 CONFIG_PHY_HI6220_USB=m
 CONFIG_PHY_HISTB_COMBPHY=m
@@ -3905,6 +3931,9 @@ CONFIG_PHY_MAPPHONE_MDM6600=m
 CONFIG_PHY_QCOM_USB_HS=m
 CONFIG_PHY_QCOM_USB_HSIC=m
 CONFIG_PHY_TUSB1210=m
+CONFIG_PHY_CIX_USBDP=m
+CONFIG_PHY_CIX_USB2=m
+CONFIG_PHY_CIX_USB3=m
 CONFIG_POWERCAP=y
 CONFIG_ARM_CCI_PMU=m
 CONFIG_ARM_CCN=m

drivers/clk/Kconfig

@@ -471,6 +471,7 @@ source "drivers/clk/actions/Kconfig"
 source "drivers/clk/analogbits/Kconfig"
 source "drivers/clk/baikal-t1/Kconfig"
 source "drivers/clk/bcm/Kconfig"
+source "drivers/clk/cix/Kconfig"
 source "drivers/clk/hisilicon/Kconfig"
 source "drivers/clk/imgtec/Kconfig"
 source "drivers/clk/imx/Kconfig"

drivers/clk/Makefile

@@ -90,6 +90,7 @@ obj-$(CONFIG_ARC_PLAT_AXS10X)		+= axs10x/
 obj-$(CONFIG_CLK_BAIKAL_T1)		+= baikal-t1/
 obj-y					+= bcm/
 obj-$(CONFIG_ARCH_BERLIN)		+= berlin/
+obj-$(CONFIG_COMMON_CLK_CIX)		+= cix/
 obj-$(CONFIG_ARCH_DAVINCI)		+= davinci/
 obj-$(CONFIG_ARCH_HISI)			+= hisilicon/
 obj-y					+= imgtec/

drivers/clk/cix/Kconfig

@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0
+# Common clock support for Cixtech SoC family
+menu "Clock support for Cixtech"
+
+comment "Clock options for Cixtech CPUs:"
+
+config COMMON_CLK_CIX
+	tristate "Support for Cix's clock controllers"
+	select REGMAP_MMIO
+	select RESET_CONTROLLER
+	help
+	  Say y here to enable common clock controller for Cix platforms.
+
+endmenu

drivers/clk/cix/Makefile

@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0
+# CIX clocks
+
+obj-y += clk-sky1-audss.o
+obj-y += acpi_clk.o
+obj-y += clk.o