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SVA->Buechi: fix translation of ##[*] and ##[+]
This fixes the translation of the SVA operators ##[*] and ##[+] to Spot's input language.
1 parent 897cb8c commit 5322bd5

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5 files changed

+9
-11
lines changed

5 files changed

+9
-11
lines changed
Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
KNOWNBUG
1+
CORE
22
../../verilog/SVA/cycle_delay_star1.sv
33
--buechi --bdd
44
^\[main.p0\] ##\[\*\] main\.x == 2 ##1 main\.x == 3: PROVED$
@@ -7,4 +7,3 @@ KNOWNBUG
77
--
88
^warning: ignoring
99
--
10-
This gives the wrong answer.
Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
KNOWNBUG
1+
CORE
22
../../verilog/SVA/cycle_delay_star1.sv
33
--buechi --bound 10
44
^\[main.p0\] ##\[\*\] main\.x == 2 ##1 main\.x == 3: PROVED up to bound 10$
@@ -7,4 +7,3 @@ KNOWNBUG
77
--
88
^warning: ignoring
99
--
10-
This gives the wrong answer.
Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
KNOWNBUG
1+
CORE
22
../../verilog/SVA/cycle_delay_star3.sv
33
--buechi --bdd
44
^\[main.p0\] ##\[\*\] main\.x == 4: PROVED up to bound 10$
@@ -7,4 +7,3 @@ KNOWNBUG
77
--
88
^warning: ignoring
99
--
10-
We get the wrong answer.
Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
KNOWNBUG
1+
CORE
22
../../verilog/SVA/cycle_delay_star3.sv
33
--buechi --bound 10
44
^\[main.p0\] ##\[\*\] main\.x == 4: PROVED up to bound 10$
@@ -7,4 +7,3 @@ KNOWNBUG
77
--
88
^warning: ignoring
99
--
10-
We get the wrong answer.

src/temporal-logic/ltl_sva_to_string.cpp

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -423,17 +423,19 @@ ltl_sva_to_stringt::rec(const exprt &expr, modet mode)
423423
}
424424
else if(expr.id() == ID_sva_cycle_delay_star) // ##[*] something
425425
{
426+
// ##[*] x ---> 1[*] ; x
426427
PRECONDITION(mode == SVA_SEQUENCE);
427428
auto new_expr = unary_exprt{
428429
ID_sva_cycle_delay_star, to_sva_cycle_delay_star_expr(expr).rhs()};
429-
return suffix("[*]", new_expr, mode);
430+
return prefix("1[*] ; ", new_expr, mode);
430431
}
431432
else if(expr.id() == ID_sva_cycle_delay_plus) // ##[+] something
432433
{
434+
// ##[+] x ---> 1[+] ; x
433435
PRECONDITION(mode == SVA_SEQUENCE);
434436
auto new_expr = unary_exprt{
435-
ID_sva_cycle_delay_star, to_sva_cycle_delay_plus_expr(expr).rhs()};
436-
return suffix("[+]", new_expr, mode);
437+
ID_sva_cycle_delay_plus, to_sva_cycle_delay_plus_expr(expr).rhs()};
438+
return prefix("1[+] ; ", new_expr, mode);
437439
}
438440
else if(expr.id() == ID_if)
439441
{

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