Skip to content

Pull requests: diffblue/hw-cbmc

New pull request New
43 Open 1,260 Closed
43 Open 1,260 Closed
Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or ⇧ + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Reviews
Filter by reviews
No reviews Review required Approved review Changes requested
Assignee
Filter by who’s assigned
Assigned to nobody Loading
Sort
Sort by
Newest Oldest Most commented Least commented Recently updated Least recently updated Best match
Most reactions
👍 👎 😄 🎉 😕 ❤️ 🚀 👀

Pull requests list

bump CBMC dependency dependencies Pull requests that update a dependency file
#1364 opened Oct 26, 2025 by kroening • Draft
additional tests for SVA->Buechi engines Tests Verilog
#1363 opened Oct 26, 2025 by kroening Loading…
SMV: introduce smv_identifier_exprt cleanup SMV
#1362 opened Oct 26, 2025 by kroening Loading…
Netlist engine: ignore various Verilog symbols engines Verilog
#1361 opened Oct 26, 2025 by kroening Loading…
Verilog: clean up expression construction cleanup Verilog
#1360 opened Oct 23, 2025 by kroening Loading…
1
SMV: enums are global SMV
#1358 opened Oct 23, 2025 by kroening • Draft
Verilog: fix semantics of cover disable iff Verilog
#1346 opened Oct 20, 2025 by kroening • Draft
SMV: implement bit selection operator SMV
#1305 opened Oct 9, 2025 by kroening • Draft
Generate VCD file for each cover statement
#1296 opened Oct 3, 2025 by ShashankVM Loading…
1
10
SystemVerilog .* wildcard port connections Verilog
#1240 opened Aug 26, 2025 by kroening • Draft
SMV: union operator SMV
#1186 opened Jul 7, 2025 by kroening • Draft
split up ltl_sva_to_stringt::rec cleanup engines
#1171 opened Jun 27, 2025 by kroening • Draft
SVA: strengthen typing of sva_sequence_concatenation_exprt cleanup
#1161 opened Jun 17, 2025 by kroening • Draft
1
NeurIPS 2025 SystemVerilog benchmarks
#1147 opened Jun 6, 2025 by kroening Loading…
SMV: bit selection operator SMV
#1113 opened May 18, 2025 by kroening • Draft
SMV: expression typechecker now post-traversal SMV
#1040 opened Mar 28, 2025 by kroening Loading…
2
SVA monitor engines Verilog
#1011 opened Feb 25, 2025 by kroening • Draft
SystemVerilog: interface instantiation Verilog
#972 opened Feb 6, 2025 by kroening • Draft
SystemVerilog: declarations in named blocks in tasks/functions Verilog
#970 opened Feb 6, 2025 by kroening • Draft
1
SystemVerilog: preserve scopes between compilation units Verilog
#963 opened Feb 4, 2025 by kroening • Draft
SystemVerilog: create identifier expressions in scanner Verilog
#953 opened Jan 29, 2025 by kroening • Draft
Add chipsalliance/sv-tests to CI
#939 opened Jan 17, 2025 by kroening • Draft
vlindex: fix parsing for constraint_block
#924 opened Jan 6, 2025 by kroening • Draft
SystemVerilog: fix identifier on enum type Verilog
#919 opened Jan 2, 2025 by kroening • Draft
liveness engine engines
#915 opened Dec 29, 2024 by kroening • Draft
ProTip! Find all pull requests that aren't related to any open issues with -linked:issue.