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Test combination of k-induction and Buechi instrumentation
This adds tests for the combination of k-induction and Buechi instrumentation.
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CORE
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../../verilog/SVA/cycle_delay2.sv
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--buechi --k-induction --bound 3
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^\[.*\] ##\[1:2\] main\.x == 2: PROVED$
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^EXIT=0$
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^SIGNAL=0$
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--
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CORE
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../../verilog/SVA/empty_sequence1.sv
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--buechi --k-induction --bound 1
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^\[main\.p0\] 1 \[\*0\]: REFUTED$
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^\[main\.p1\] \(1 \[\*0\]\) ##1 main\.x == 0: PROVED$
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^\[main\.p2\] main\.x == 0 ##1 \(1 \[\*0\]\): PROVED$
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^\[main\.p3\] \(1 \[\*0\]\) ##0 1: REFUTED$
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^\[main\.p4\] 1 ##0 \(1 \[\*0\]\): REFUTED$
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^EXIT=10$
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^SIGNAL=0$
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--
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^warning: ignoring
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--
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CORE
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../../verilog/SVA/eventually1.sv
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--buechi --k-induction --bound 2
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^\[main\.p0\] always \(main\.counter == 1 implies \(eventually \[1:2\] main\.counter == 3\)\): PROVED$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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CORE
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../../verilog/SVA/eventually4.sv
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--buechi --k-induction --bound 1
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--
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CORE
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../../verilog/SVA/followed-by1.sv
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--buechi --k-induction --bound 1
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^\[main\.p0\] main\.x == 0 #=# \(main\.x == 1 #=# main\.x == 2\): PROVED$
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^\[main\.p1\] main\.x == 0 #-# \(\(##1 main\.x == 1\) #-# \(##1 main\.x == 2\)\): PROVED$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--
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CORE
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../../verilog/SVA/followed-by2.sv
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--buechi --k-induction --bound 1
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^\[main\.p0\] always \(\(main\.a #-# main\.b\) iff \(not \(main\.a |-> \(not main\.b\)\)\)\): PROVED$
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^\[main\.p1\] always \(\(main\.a #=# main\.b\) iff \(not \(main\.a |=> \(not main\.b\)\)\)\): PROVED$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--
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CORE
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../../verilog/SVA/followed-by4.sv
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--buechi --k-induction --bound 3
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^\[main\.p1\] always \(main\.x == 0 #-# 1\): REFUTED$
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^\[main\.p2\] \(1 or \(##2 1\)\) #-# main\.x == 2: PROVED$
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^\[main\.p3\] \(1 or \(##2 1\)\) #-# main\.x == 0: PROVED$
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^EXIT=10$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

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