feat: add RISC-V (riscv64) architecture support#307
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mauromorales merged 14 commits intomainfrom Apr 20, 2026
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Itxaka
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Apr 14, 2026
Itxaka
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Apr 14, 2026
- Add PR_riscv64.yml workflow using RISE RISC-V runners for native builds - Update Dockerfile with RISC-V cross-compilation, kernel builds, GRUB EFI - Update Makefile to support riscv64 arch and QEMU emulation - Add cloud and default kernel configs for RISC-V Made-with: Cursor Signed-off-by: Mauro Morales <contact@mauromorales.com>
The 2xlarge variant was not picking up jobs. Made-with: Cursor Signed-off-by: Mauro Morales <contact@mauromorales.com>
Signed-off-by: Mauro Morales <contact@mauromorales.com>
Signed-off-by: Mauro Morales <contact@mauromorales.com>
Remove --with-cpu and --with-tune flags, keeping only --with-arch=rv64gc and --with-abi=lp64d for broader hardware compatibility. Made-with: Cursor Signed-off-by: Mauro Morales <contact@mauromorales.com>
Signed-off-by: Mauro Morales <contact@mauromorales.com>
Remove unnecessary BUSYBOX_ARCH mapping - BusyBox handles ARCH directly. Disable CONFIG_SHA1_HWACCEL for all non-x86 architectures since it relies on x86-specific SHA-NI instructions. Made-with: Cursor Signed-off-by: Mauro Morales <contact@mauromorales.com>
Keep --with-arch, --with-tune, and --with-abi as upstream recommends. Made-with: Cursor Signed-off-by: Mauro Morales <contact@mauromorales.com>
The previous single-job toolchain build timed out on QEMU due to the
entire mussel bootstrap + all packages running in one step.
Replace it with a pipeline of small jobs, each writing its result to
the quay.io cache so a timeout or failure only loses one step:
stage0 → stage1 → rsync ─┬→ cmake ───┐
├→ kernel ──┤
├→ systemd ─┤→ toolchain → container → …
└→ python ──┘
The four parallel jobs (cmake, kernel, systemd, python-build) cover the
most expensive independent builds; the final toolchain job finds them
already cached and only compiles the remaining delta.
All jobs run on oracle-vm-32cpu-128gb-x86-64. The Dockerfile has no
FROM --platform overrides so every stage executes riscv64 binaries
regardless of runner; QEMU on 32 cores + 128 GB beats native RISC-V on
4 cores + 16 GB where RAM pressure alone would cause swap on large builds.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
Signed-off-by: Mauro Morales <contact@mauromorales.com>
Signed-off-by: Mauro Morales <contact@mauromorales.com>
Add staged build pipeline for riscv64 that pushes to ghcr.io. Uses QEMU emulation on x86-64 runners with aggressive caching. Made-with: Cursor Signed-off-by: Mauro Morales <contact@mauromorales.com>
Itxaka
reviewed
Apr 17, 2026
Itxaka
reviewed
Apr 17, 2026
Itxaka
reviewed
Apr 17, 2026
Itxaka
reviewed
Apr 17, 2026
Replace double-negative arch checks with simpler positive check. Made-with: Cursor Signed-off-by: Mauro Morales <contact@mauromorales.com>
Upstream now removes --with-cpu for RISC-V, so we can drop our workaround. Made-with: Cursor Signed-off-by: Mauro Morales <contact@mauromorales.com>
PR builds should only consume cache from main, not push to it. Cache is pushed only from the main branch builds. Signed-off-by: Mauro Morales <mauro.morales@spectrocloud.com> Made-with: Cursor Signed-off-by: Mauro Morales <contact@mauromorales.com>
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fyi @luhenry, and any feedback is also welcome |
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Made-with: Cursor