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[NVPTX] Add support for local volatile memory operations #150099

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17 changes: 10 additions & 7 deletions llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -645,15 +645,17 @@ getOperationOrderings(MemSDNode *N, const NVPTXSubtarget *Subtarget) {
// Calling "example" in CUDA C++ compiled for sm_60- exhibits undefined
// behavior due to lack of Independent Forward Progress. Lowering these
// to weak memory operations in sm_60- is therefore fine.
//
// TODO: lower atomic and volatile operations to memory locations
// in local, const, and param to two PTX instructions in sm_70+:
// - the "weak" memory instruction we are currently lowering to, and
// - some other instruction that preserves the side-effect, e.g.,
// a dead dummy volatile load.
if (CodeAddrSpace == NVPTX::AddressSpace::Local ||
CodeAddrSpace == NVPTX::AddressSpace::Const ||
CodeAddrSpace == NVPTX::AddressSpace::Param) {

if (CodeAddrSpace == NVPTX::AddressSpace::Const ||
CodeAddrSpace == NVPTX::AddressSpace::Param ||
(CodeAddrSpace == NVPTX::AddressSpace::Local
&& (!N->isVolatile() || Ordering != AtomicOrdering::NotAtomic))) {
// Allow non-atomic local volatile operations
return NVPTX::Ordering::NotAtomic;
}

Expand All @@ -677,12 +679,13 @@ getOperationOrderings(MemSDNode *N, const NVPTXSubtarget *Subtarget) {
// from .generic, .global, or .shared. The behavior of PTX volatile and PTX
// atomics is undefined if the generic address does not refer to a .global or
// .shared memory location.
bool AddrGenericOrGlobalOrShared =
bool AddrGenericOrGlobalOrSharedorLocal =
(CodeAddrSpace == NVPTX::AddressSpace::Generic ||
CodeAddrSpace == NVPTX::AddressSpace::Global ||
CodeAddrSpace == NVPTX::AddressSpace::Shared ||
CodeAddrSpace == NVPTX::AddressSpace::SharedCluster);
if (!AddrGenericOrGlobalOrShared)
CodeAddrSpace == NVPTX::AddressSpace::SharedCluster ||
CodeAddrSpace == NVPTX::AddressSpace::Local);
if (!AddrGenericOrGlobalOrSharedorLocal)
return NVPTX::Ordering::NotAtomic;

bool UseRelaxedMMIO =
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/NVPTX/forward-ld-param.ll
Original file line number Diff line number Diff line change
Expand Up @@ -85,7 +85,7 @@ define i32 @test_modify_param(ptr byval([10 x i32]) %a, i32 %b, i32 %c ) {
; CHECK-NEXT: mov.b64 %rd1, test_modify_param_param_0;
; CHECK-NEXT: ld.param.b32 %r1, [test_modify_param_param_1];
; CHECK-NEXT: ld.param.b32 %r2, [test_modify_param_param_2];
; CHECK-NEXT: st.local.b32 [%rd1+2], %r1;
; CHECK-NEXT: st.volatile.local.b32 [%rd1+2], %r1;
; CHECK-NEXT: st.param.b32 [func_retval0], %r2;
; CHECK-NEXT: ret;
%p2 = getelementptr i8, ptr %a, i32 2
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/NVPTX/load-store-scalars.ll
Original file line number Diff line number Diff line change
Expand Up @@ -2643,9 +2643,9 @@ define void @local_volatile_i8(ptr addrspace(5) %a) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [local_volatile_i8_param_0];
; CHECK-NEXT: ld.local.b8 %rs1, [%rd1];
; CHECK-NEXT: ld.volatile.local.b8 %rs1, [%rd1];
; CHECK-NEXT: add.s16 %rs2, %rs1, 1;
; CHECK-NEXT: st.local.b8 [%rd1], %rs2;
; CHECK-NEXT: st.volatile.local.b8 [%rd1], %rs2;
; CHECK-NEXT: ret;
%a.load = load volatile i8, ptr addrspace(5) %a
%a.add = add i8 %a.load, 1
Expand All @@ -2661,9 +2661,9 @@ define void @local_volatile_i16(ptr addrspace(5) %a) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [local_volatile_i16_param_0];
; CHECK-NEXT: ld.local.b16 %rs1, [%rd1];
; CHECK-NEXT: ld.volatile.local.b16 %rs1, [%rd1];
; CHECK-NEXT: add.s16 %rs2, %rs1, 1;
; CHECK-NEXT: st.local.b16 [%rd1], %rs2;
; CHECK-NEXT: st.volatile.local.b16 [%rd1], %rs2;
; CHECK-NEXT: ret;
%a.load = load volatile i16, ptr addrspace(5) %a
%a.add = add i16 %a.load, 1
Expand All @@ -2679,9 +2679,9 @@ define void @local_volatile_i32(ptr addrspace(5) %a) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [local_volatile_i32_param_0];
; CHECK-NEXT: ld.local.b32 %r1, [%rd1];
; CHECK-NEXT: ld.volatile.local.b32 %r1, [%rd1];
; CHECK-NEXT: add.s32 %r2, %r1, 1;
; CHECK-NEXT: st.local.b32 [%rd1], %r2;
; CHECK-NEXT: st.volatile.local.b32 [%rd1], %r2;
; CHECK-NEXT: ret;
%a.load = load volatile i32, ptr addrspace(5) %a
%a.add = add i32 %a.load, 1
Expand All @@ -2696,9 +2696,9 @@ define void @local_volatile_i64(ptr addrspace(5) %a) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [local_volatile_i64_param_0];
; CHECK-NEXT: ld.local.b64 %rd2, [%rd1];
; CHECK-NEXT: ld.volatile.local.b64 %rd2, [%rd1];
; CHECK-NEXT: add.s64 %rd3, %rd2, 1;
; CHECK-NEXT: st.local.b64 [%rd1], %rd3;
; CHECK-NEXT: st.volatile.local.b64 [%rd1], %rd3;
; CHECK-NEXT: ret;
%a.load = load volatile i64, ptr addrspace(5) %a
%a.add = add i64 %a.load, 1
Expand All @@ -2714,9 +2714,9 @@ define void @local_volatile_float(ptr addrspace(5) %a) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [local_volatile_float_param_0];
; CHECK-NEXT: ld.local.b32 %r1, [%rd1];
; CHECK-NEXT: ld.volatile.local.b32 %r1, [%rd1];
; CHECK-NEXT: add.rn.f32 %r2, %r1, 0f3F800000;
; CHECK-NEXT: st.local.b32 [%rd1], %r2;
; CHECK-NEXT: st.volatile.local.b32 [%rd1], %r2;
; CHECK-NEXT: ret;
%a.load = load volatile float, ptr addrspace(5) %a
%a.add = fadd float %a.load, 1.
Expand All @@ -2731,9 +2731,9 @@ define void @local_volatile_double(ptr addrspace(5) %a) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [local_volatile_double_param_0];
; CHECK-NEXT: ld.local.b64 %rd2, [%rd1];
; CHECK-NEXT: ld.volatile.local.b64 %rd2, [%rd1];
; CHECK-NEXT: add.rn.f64 %rd3, %rd2, 0d3FF0000000000000;
; CHECK-NEXT: st.local.b64 [%rd1], %rd3;
; CHECK-NEXT: st.volatile.local.b64 [%rd1], %rd3;
; CHECK-NEXT: ret;
%a.load = load volatile double, ptr addrspace(5) %a
%a.add = fadd double %a.load, 1.
Expand Down
1 change: 0 additions & 1 deletion llvm/test/CodeGen/NVPTX/load-store-sm-90.ll
Original file line number Diff line number Diff line change
Expand Up @@ -1550,7 +1550,6 @@ define void @shared_seq_cst_volatile_cluster(ptr addrspace(3) %a, ptr addrspace(
}

;; local statespace

; CHECK-LABEL: local_unordered_cluster
define void @local_unordered_cluster(ptr addrspace(5) %a, ptr addrspace(5) %b, ptr addrspace(5) %c, ptr addrspace(5) %d, ptr addrspace(5) %e) local_unnamed_addr {
; CHECK-LABEL: local_unordered_cluster(
Expand Down
64 changes: 32 additions & 32 deletions llvm/test/CodeGen/NVPTX/load-store-vectors-256.ll
Original file line number Diff line number Diff line change
Expand Up @@ -1280,11 +1280,11 @@ define void @local_volatile_32xi8(ptr addrspace(5) %a, ptr addrspace(5) %b) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [local_volatile_32xi8_param_0];
; CHECK-NEXT: ld.local.v4.b32 {%r1, %r2, %r3, %r4}, [%rd1];
; CHECK-NEXT: ld.local.v4.b32 {%r5, %r6, %r7, %r8}, [%rd1+16];
; CHECK-NEXT: ld.volatile.local.v4.b32 {%r1, %r2, %r3, %r4}, [%rd1];
; CHECK-NEXT: ld.volatile.local.v4.b32 {%r5, %r6, %r7, %r8}, [%rd1+16];
; CHECK-NEXT: ld.param.b64 %rd2, [local_volatile_32xi8_param_1];
; CHECK-NEXT: st.local.v4.b32 [%rd2+16], {%r5, %r6, %r7, %r8};
; CHECK-NEXT: st.local.v4.b32 [%rd2], {%r1, %r2, %r3, %r4};
; CHECK-NEXT: st.volatile.local.v4.b32 [%rd2+16], {%r5, %r6, %r7, %r8};
; CHECK-NEXT: st.volatile.local.v4.b32 [%rd2], {%r1, %r2, %r3, %r4};
; CHECK-NEXT: ret;
%a.load = load volatile <32 x i8>, ptr addrspace(5) %a
store volatile <32 x i8> %a.load, ptr addrspace(5) %b
Expand All @@ -1299,11 +1299,11 @@ define void @local_volatile_16xi16(ptr addrspace(5) %a, ptr addrspace(5) %b) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [local_volatile_16xi16_param_0];
; CHECK-NEXT: ld.local.v4.b32 {%r1, %r2, %r3, %r4}, [%rd1];
; CHECK-NEXT: ld.local.v4.b32 {%r5, %r6, %r7, %r8}, [%rd1+16];
; CHECK-NEXT: ld.volatile.local.v4.b32 {%r1, %r2, %r3, %r4}, [%rd1];
; CHECK-NEXT: ld.volatile.local.v4.b32 {%r5, %r6, %r7, %r8}, [%rd1+16];
; CHECK-NEXT: ld.param.b64 %rd2, [local_volatile_16xi16_param_1];
; CHECK-NEXT: st.local.v4.b32 [%rd2+16], {%r5, %r6, %r7, %r8};
; CHECK-NEXT: st.local.v4.b32 [%rd2], {%r1, %r2, %r3, %r4};
; CHECK-NEXT: st.volatile.local.v4.b32 [%rd2+16], {%r5, %r6, %r7, %r8};
; CHECK-NEXT: st.volatile.local.v4.b32 [%rd2], {%r1, %r2, %r3, %r4};
; CHECK-NEXT: ret;
%a.load = load volatile <16 x i16>, ptr addrspace(5) %a
store volatile <16 x i16> %a.load, ptr addrspace(5) %b
Expand All @@ -1318,11 +1318,11 @@ define void @local_volatile_16xhalf(ptr addrspace(5) %a, ptr addrspace(5) %b) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [local_volatile_16xhalf_param_0];
; CHECK-NEXT: ld.local.v4.b32 {%r1, %r2, %r3, %r4}, [%rd1];
; CHECK-NEXT: ld.local.v4.b32 {%r5, %r6, %r7, %r8}, [%rd1+16];
; CHECK-NEXT: ld.volatile.local.v4.b32 {%r1, %r2, %r3, %r4}, [%rd1];
; CHECK-NEXT: ld.volatile.local.v4.b32 {%r5, %r6, %r7, %r8}, [%rd1+16];
; CHECK-NEXT: ld.param.b64 %rd2, [local_volatile_16xhalf_param_1];
; CHECK-NEXT: st.local.v4.b32 [%rd2+16], {%r5, %r6, %r7, %r8};
; CHECK-NEXT: st.local.v4.b32 [%rd2], {%r1, %r2, %r3, %r4};
; CHECK-NEXT: st.volatile.local.v4.b32 [%rd2+16], {%r5, %r6, %r7, %r8};
; CHECK-NEXT: st.volatile.local.v4.b32 [%rd2], {%r1, %r2, %r3, %r4};
; CHECK-NEXT: ret;
%a.load = load volatile <16 x half>, ptr addrspace(5) %a
store volatile <16 x half> %a.load, ptr addrspace(5) %b
Expand All @@ -1337,11 +1337,11 @@ define void @local_volatile_16xbfloat(ptr addrspace(5) %a, ptr addrspace(5) %b)
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [local_volatile_16xbfloat_param_0];
; CHECK-NEXT: ld.local.v4.b32 {%r1, %r2, %r3, %r4}, [%rd1];
; CHECK-NEXT: ld.local.v4.b32 {%r5, %r6, %r7, %r8}, [%rd1+16];
; CHECK-NEXT: ld.volatile.local.v4.b32 {%r1, %r2, %r3, %r4}, [%rd1];
; CHECK-NEXT: ld.volatile.local.v4.b32 {%r5, %r6, %r7, %r8}, [%rd1+16];
; CHECK-NEXT: ld.param.b64 %rd2, [local_volatile_16xbfloat_param_1];
; CHECK-NEXT: st.local.v4.b32 [%rd2+16], {%r5, %r6, %r7, %r8};
; CHECK-NEXT: st.local.v4.b32 [%rd2], {%r1, %r2, %r3, %r4};
; CHECK-NEXT: st.volatile.local.v4.b32 [%rd2+16], {%r5, %r6, %r7, %r8};
; CHECK-NEXT: st.volatile.local.v4.b32 [%rd2], {%r1, %r2, %r3, %r4};
; CHECK-NEXT: ret;
%a.load = load volatile <16 x bfloat>, ptr addrspace(5) %a
store volatile <16 x bfloat> %a.load, ptr addrspace(5) %b
Expand All @@ -1356,11 +1356,11 @@ define void @local_volatile_8xi32(ptr addrspace(5) %a, ptr addrspace(5) %b) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [local_volatile_8xi32_param_0];
; CHECK-NEXT: ld.local.v4.b32 {%r1, %r2, %r3, %r4}, [%rd1];
; CHECK-NEXT: ld.local.v4.b32 {%r5, %r6, %r7, %r8}, [%rd1+16];
; CHECK-NEXT: ld.volatile.local.v4.b32 {%r1, %r2, %r3, %r4}, [%rd1];
; CHECK-NEXT: ld.volatile.local.v4.b32 {%r5, %r6, %r7, %r8}, [%rd1+16];
; CHECK-NEXT: ld.param.b64 %rd2, [local_volatile_8xi32_param_1];
; CHECK-NEXT: st.local.v4.b32 [%rd2+16], {%r5, %r6, %r7, %r8};
; CHECK-NEXT: st.local.v4.b32 [%rd2], {%r1, %r2, %r3, %r4};
; CHECK-NEXT: st.volatile.local.v4.b32 [%rd2+16], {%r5, %r6, %r7, %r8};
; CHECK-NEXT: st.volatile.local.v4.b32 [%rd2], {%r1, %r2, %r3, %r4};
; CHECK-NEXT: ret;
%a.load = load volatile <8 x i32>, ptr addrspace(5) %a
store volatile <8 x i32> %a.load, ptr addrspace(5) %b
Expand All @@ -1374,11 +1374,11 @@ define void @local_volatile_4xi64(ptr addrspace(5) %a, ptr addrspace(5) %b) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [local_volatile_4xi64_param_0];
; CHECK-NEXT: ld.local.v2.b64 {%rd2, %rd3}, [%rd1];
; CHECK-NEXT: ld.local.v2.b64 {%rd4, %rd5}, [%rd1+16];
; CHECK-NEXT: ld.volatile.local.v2.b64 {%rd2, %rd3}, [%rd1];
; CHECK-NEXT: ld.volatile.local.v2.b64 {%rd4, %rd5}, [%rd1+16];
; CHECK-NEXT: ld.param.b64 %rd6, [local_volatile_4xi64_param_1];
; CHECK-NEXT: st.local.v2.b64 [%rd6+16], {%rd4, %rd5};
; CHECK-NEXT: st.local.v2.b64 [%rd6], {%rd2, %rd3};
; CHECK-NEXT: st.volatile.local.v2.b64 [%rd6+16], {%rd4, %rd5};
; CHECK-NEXT: st.volatile.local.v2.b64 [%rd6], {%rd2, %rd3};
; CHECK-NEXT: ret;
%a.load = load volatile <4 x i64>, ptr addrspace(5) %a
store volatile <4 x i64> %a.load, ptr addrspace(5) %b
Expand All @@ -1392,11 +1392,11 @@ define void @local_volatile_8xfloat(ptr addrspace(5) %a, ptr addrspace(5) %b) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [local_volatile_8xfloat_param_0];
; CHECK-NEXT: ld.local.v2.b64 {%rd2, %rd3}, [%rd1];
; CHECK-NEXT: ld.local.v2.b64 {%rd4, %rd5}, [%rd1+16];
; CHECK-NEXT: ld.volatile.local.v2.b64 {%rd2, %rd3}, [%rd1];
; CHECK-NEXT: ld.volatile.local.v2.b64 {%rd4, %rd5}, [%rd1+16];
; CHECK-NEXT: ld.param.b64 %rd6, [local_volatile_8xfloat_param_1];
; CHECK-NEXT: st.local.v2.b64 [%rd6+16], {%rd4, %rd5};
; CHECK-NEXT: st.local.v2.b64 [%rd6], {%rd2, %rd3};
; CHECK-NEXT: st.volatile.local.v2.b64 [%rd6+16], {%rd4, %rd5};
; CHECK-NEXT: st.volatile.local.v2.b64 [%rd6], {%rd2, %rd3};
; CHECK-NEXT: ret;
%a.load = load volatile <8 x float>, ptr addrspace(5) %a
store volatile <8 x float> %a.load, ptr addrspace(5) %b
Expand All @@ -1410,11 +1410,11 @@ define void @local_volatile_4xdouble(ptr addrspace(5) %a, ptr addrspace(5) %b) {
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [local_volatile_4xdouble_param_0];
; CHECK-NEXT: ld.local.v2.b64 {%rd2, %rd3}, [%rd1];
; CHECK-NEXT: ld.local.v2.b64 {%rd4, %rd5}, [%rd1+16];
; CHECK-NEXT: ld.volatile.local.v2.b64 {%rd2, %rd3}, [%rd1];
; CHECK-NEXT: ld.volatile.local.v2.b64 {%rd4, %rd5}, [%rd1+16];
; CHECK-NEXT: ld.param.b64 %rd6, [local_volatile_4xdouble_param_1];
; CHECK-NEXT: st.local.v2.b64 [%rd6+16], {%rd4, %rd5};
; CHECK-NEXT: st.local.v2.b64 [%rd6], {%rd2, %rd3};
; CHECK-NEXT: st.volatile.local.v2.b64 [%rd6+16], {%rd4, %rd5};
; CHECK-NEXT: st.volatile.local.v2.b64 [%rd6], {%rd2, %rd3};
; CHECK-NEXT: ret;
%a.load = load volatile <4 x double>, ptr addrspace(5) %a
store volatile <4 x double> %a.load, ptr addrspace(5) %b
Expand Down
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