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added a derived m6502 type for the VT3xx series sound CPU with a few basic opcode changes + preliminary hook up so that denv150 boots to something #13689

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97a5df7
create derived 6502 for VT369 SPU
May 7, 2025
ce047ac
a few ops
May 8, 2025
4adf74c
allow it to see .. something (maybe not the right thing, but something)
May 8, 2025
af0b245
less complex logic works better here, correct data is copied
May 8, 2025
8662349
this is also customized
May 8, 2025
b4baf45
fix build
May 8, 2025
5faf6c5
more realistic opcode here, maybe not correct though
May 8, 2025
63683c4
address notes for sound cpu
May 8, 2025
be8c56e
reorganize some VT3xx code for later
May 8, 2025
fbc1397
allow default encryption state to be changed
May 8, 2025
aae8697
small reshuffle
May 8, 2025
efe00aa
move the internal SoC ROMs as they seem standard issue
May 8, 2025
5dee4b7
remove some dead code
May 8, 2025
5b34d55
actually don't move these to a device ROM yet, some of them look like…
May 8, 2025
0b9cffa
drop some nes_ prefixes
May 8, 2025
758e05b
use better finder
May 8, 2025
63b4509
seems like internal ROM can also be visible in sound CPU space at 0x4…
May 9, 2025
5592b99
kill off some redundant / wrong configs
May 9, 2025
255b41e
some logging stubs for the sound CPU
May 9, 2025
fd7b941
begin adding a timer
May 9, 2025
1ad2d8a
run a sound timer, allows denv150 to boot (with bad gfx due to missin…
May 9, 2025
1e1aa8f
reoganize a little
May 9, 2025
42b87c2
a bit of tidy up
May 9, 2025
4bb1774
some prep for a derived PPU for VT3xx
May 13, 2025
59b0f88
treat alt VT descrambles as different SoC types as this seems hardcod…
May 13, 2025
69e973b
improve previous commit
May 13, 2025
e61ffa7
change naming
May 13, 2025
6b6a7b9
refactoring
May 13, 2025
c1fbf86
further refactoring
May 13, 2025
6c5af0f
more refactoring
May 13, 2025
764a27c
fix validation
May 13, 2025
ade3146
refactor
May 13, 2025
e002696
some stubs for adding extended rendering code
May 13, 2025
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25 changes: 25 additions & 0 deletions scripts/src/cpu.lua
Original file line number Diff line number Diff line change
Expand Up @@ -1761,6 +1761,7 @@ end
--@src/devices/cpu/m6502/st2xxx.h,CPUS["ST2XXX"] = true
--@src/devices/cpu/m6502/st2204.h,CPUS["ST2XXX"] = true
--@src/devices/cpu/m6502/st2205u.h,CPUS["ST2XXX"] = true
--@src/devices/cpu/m6502/vt3xx_spu.h,CPUS["VT3XX_SPU"] = true
--@src/devices/cpu/m6502/w65c02.h,CPUS["M6502"] = true
--@src/devices/cpu/m6502/w65c02s.h,CPUS["M6502"] = true
--@src/devices/cpu/m6502/xavix.h,CPUS["XAVIX"] = true
Expand Down Expand Up @@ -1868,6 +1869,21 @@ if CPUS["ST2XXX"] then
}
end

if CPUS["VT3XX_SPU"] then
files {
MAME_DIR .. "src/devices/cpu/m6502/vt3xx_spu.cpp",
MAME_DIR .. "src/devices/cpu/m6502/vt3xx_spu.h",
}

custombuildtask {
{ MAME_DIR .. "src/devices/cpu/m6502/ovt3xx_spu.lst", GEN_DIR .. "emu/cpu/m6502/vt3xx_spu.hxx", { MAME_DIR .. "src/devices/cpu/m6502/m6502make.py", MAME_DIR .. "src/devices/cpu/m6502/dvt3xx_spu.lst" }, {"@echo Generating VT3xx SPU instruction source file...", PYTHON .. " $(1) s vt3xx_spu $(<) $(2) $(@)" }},
}

dependency {
{ MAME_DIR .. "src/devices/cpu/m6502/vt3xx_spu.cpp", GEN_DIR .. "emu/cpu/m6502/vt3xx_spu.hxx" },
}
end

if CPUS["XAVIX"] then
files {
MAME_DIR .. "src/devices/cpu/m6502/xavix.cpp",
Expand Down Expand Up @@ -1947,6 +1963,15 @@ if opt_tool(CPUS, "M6502") then
table.insert(disasm_files, MAME_DIR .. "src/devices/cpu/m6502/w65c02d.h")
end

if opt_tool(CPUS, "VT3XX_SPU") then
table.insert(disasm_custombuildtask, { MAME_DIR .. "src/devices/cpu/m6502/ovt3xx_spu.lst", GEN_DIR .. "emu/cpu/m6502/vt3xx_spud.hxx", { MAME_DIR .. "src/devices/cpu/m6502/m6502make.py", MAME_DIR .. "src/devices/cpu/m6502/dvt3xx_spu.lst" }, {"@echo Generating VT3xx SPU disassembler source file...", PYTHON .. " $(1) d vt3xx_spu $(<) $(2) $(@)" }})

table.insert(disasm_dependency, { MAME_DIR .. "src/devices/cpu/m6502/vt3xx_spud.cpp", GEN_DIR .. "emu/cpu/m6502/vt3xx_spud.hxx" })

table.insert(disasm_files, MAME_DIR .. "src/devices/cpu/m6502/vt3xx_spud.cpp")
table.insert(disasm_files, MAME_DIR .. "src/devices/cpu/m6502/vt3xx_spud.h")
end

if opt_tool(CPUS, "XAVIX") then
table.insert(disasm_custombuildtask, { MAME_DIR .. "src/devices/cpu/m6502/oxavix.lst", GEN_DIR .. "emu/cpu/m6502/xavixd.hxx", { MAME_DIR .. "src/devices/cpu/m6502/m6502make.py", MAME_DIR .. "src/devices/cpu/m6502/dxavix.lst" }, {"@echo Generating xavix disassembler source file...", PYTHON .. " $(1) d xavix $(<) $(2) $(@)" }})

Expand Down
20 changes: 20 additions & 0 deletions src/devices/cpu/m6502/dvt3xx_spu.lst
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
# license:BSD-3-Clause
# copyright-holders:David Haywood
# vt3xx_spu - m6502 with custom opcodes
brk_imp ora_idx kil_non slo_idx nop_zpg ora_zpg asl_zpg slo_zpg php_imp ora_imm asl_acc anc_imm nop_aba ora_aba asl_aba slo_aba
bpl_rel ora_idy kil_non slo_idy nop_zpx ora_zpx asl_zpx slo_zpx clc_imp ora_aby nop_imp slo_aby nop_abx ora_abx asl_abx slo_abx
jsr_adr and_idx kil_non rla_idx bit_zpg and_zpg rol_zpg rla_zpg plp_imp and_imm rol_acc anc_imm bit_aba and_aba rol_aba rla_aba
bmi_rel and_idy kil_non rla_idy ply_vt_imp and_zpx rol_zpx rla_zpx sec_imp and_aby nop_imp rla_aby plx_vt_imp and_abx rol_abx rla_abx
rti_imp eor_idx kil_non sre_idx nop_zpg eor_zpg lsr_zpg sre_zpg pha_imp eor_imm lsr_acc asr_imm jmp_adr eor_aba lsr_aba sre_aba
bvc_rel eor_idy kil_non sre_idy nop_zpx eor_zpx lsr_zpx sre_zpx cli_imp eor_aby vtsetdbk_imp sre_aby nop_abx eor_abx lsr_abx sre_abx
rts_imp adc_idx vtadcx_aba rra_idx nop_zpg adc_zpg ror_zpg rra_zpg pla_imp adc_imm ror_acc arr_imm jmp_ind adc_aba ror_aba rra_aba
bvs_rel adc_idy kil_non rra_idy nop_zpx adc_zpx ror_zpx rra_zpx sei_imp adc_aby vtgetdbk_imp rra_aby nop_abx adc_abx ror_abx rra_abx
nop_imm sta_idx nop_imm sax_idx sty_zpg sta_zpg stx_zpg sax_zpg dey_imp nop_imm txa_imp ane_imm sty_aba sta_aba stx_aba sax_aba
bcc_rel sta_idy kil_non sha_idy sty_zpx sta_zpx stx_zpy sax_zpy tya_imp sta_aby txs_imp shs_aby shy_abx sta_abx shx_aby sha_aby
ldy_imm lda_idx ldx_imm lax_idx ldy_zpg lda_zpg ldx_zpg vtldabank2_zpy tay_imp lda_imm tax_imp lxa_imm ldy_aba lda_aba ldx_aba lax_aba
bcs_rel lda_idy kil_non lax_idy ldy_zpx lda_zpx ldx_zpy lax_zpy clv_imp lda_aby tsx_imp las_aby ldy_abx lda_abx ldx_aby vtldabank_abx
cpy_imm cmp_idx phx_vt_imp dcp_idx cpy_zpg cmp_zpg dec_zpg dcp_zpg iny_imp cmp_imm dex_imp sbx_imm cpy_aba cmp_aba dec_aba dcp_aba
bne_rel cmp_idy phy_vt_imp dcp_idy nop_zpx cmp_zpx dec_zpx dcp_zpx cld_imp cmp_aby nop_imp dcp_aby nop_abx cmp_abx dec_abx dcp_abx
cpx_imm sbc_idx nop_imm isb_idx cpx_zpg sbc_zpg inc_zpg isb_zpg inx_imp sbc_imm nop_imp sbc_imm cpx_aba sbc_aba inc_aba isb_aba
beq_rel sbc_idy kil_non isb_idy nop_zpx sbc_zpx inc_zpx isb_zpx sed_imp sbc_aby nop_imp isb_aby nop_abx sbc_abx inc_abx isb_abx
reset
66 changes: 66 additions & 0 deletions src/devices/cpu/m6502/ovt3xx_spu.lst
Original file line number Diff line number Diff line change
@@ -0,0 +1,66 @@
# license:BSD-3-Clause
# copyright-holders:David Haywood
# vt3xx_spu opcodes

phy_vt_imp
read_pc();
write(SP, Y);
dec_SP();
prefetch();

phx_vt_imp
read_pc();
write(SP, X);
dec_SP();
prefetch();

plx_vt_imp
read_pc();
read(SP);
inc_SP();
X = read(SP);
set_nz(X);
prefetch();

ply_vt_imp
read_pc();
read(SP);
inc_SP();
Y = read(SP);
set_nz(Y);
prefetch();

vtgetdbk_imp
read_pc();
A = m_databank;
prefetch();

vtsetdbk_imp
read_pc();
m_databank = A;
prefetch();

vtldabank_abx
TMP = read_pc();
PC++;
TMP2 = read_pc();
PC++;
A = m_extdata_space->read_byte(((m_databank << 16) | (TMP2 << 8) | TMP) + X);
set_nz(A);
prefetch();

vtldabank2_zpy
TMP = read_pc();
PC++;
A = m_extdata_space->read_byte(read(uint8_t(TMP+Y)));
set_nz(A);
prefetch();

vtadcx_aba
TMP = read_pc();
PC++;
TMP2 = read_pc();
PC++;
A = m_extdata_space->read_byte((TMP2 << 8) | TMP) + X;
set_nz(A); // other flags?
prefetch();
107 changes: 107 additions & 0 deletions src/devices/cpu/m6502/vt3xx_spu.cpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,107 @@
// license:BSD-3-Clause
// copyright-holders:David Haywood
/***************************************************************************

vt3xx_spu.cpp

6502 derived sound/sub CPU for VT3xx series chips

has some additional opcodes for reading/writing the 24-bit 'onebus'
with an extra register to store the upper 8-bits of the access address

- should this instead derive from the rp2a03 as is the case for the
main CPUs on many of the VT chips, or is using the m6502 as a base
correct in this case?

***************************************************************************/

#include "emu.h"
#include "vt3xx_spu.h"
#include "vt3xx_spud.h"

DEFINE_DEVICE_TYPE(VT3XX_SPU, vt3xx_spu_device, "vt3xx_spu", "VT3xx SPU")

vt3xx_spu_device::vt3xx_spu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
vt3xx_spu_device(mconfig, VT3XX_SPU, tag, owner, clock)
{
}

vt3xx_spu_device::vt3xx_spu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
m6502_device(mconfig, type, tag, owner, clock),
m_extdata_config("extdata", ENDIANNESS_LITTLE, 8, 24)
{
}


std::unique_ptr<util::disasm_interface> vt3xx_spu_device::create_disassembler()
{
return std::make_unique<vt3xx_spu_disassembler>();
}

void vt3xx_spu_device::device_start()
{
m6502_device::device_start();

m_extdata_space = &space(5);

state_add(VT3XX_SPU_DATABANK, "DATBNK", m_databank).callimport().formatstr("%2s");

save_item(NAME(m_databank));
}

void vt3xx_spu_device::device_reset()
{
set_databank(0);
m6502_device::device_reset();
}


inline void vt3xx_spu_device::set_databank(uint8_t bank)
{
m_databank = bank;
}

inline uint8_t vt3xx_spu_device::get_databank()
{
return m_databank;
}

device_memory_interface::space_config_vector vt3xx_spu_device::memory_space_config() const
{
if(has_configured_map(AS_OPCODES))
return space_config_vector {
std::make_pair(AS_PROGRAM, &program_config),
std::make_pair(AS_OPCODES, &sprogram_config),
std::make_pair(5, &m_extdata_config),
};
else
return space_config_vector {
std::make_pair(AS_PROGRAM, &program_config),
std::make_pair(5, &m_extdata_config),
};
}

void vt3xx_spu_device::state_import(const device_state_entry &entry)
{
m6502_device::state_import(entry);

switch(entry.index())
{
case VT3XX_SPU_DATABANK:
break;
}
}

void vt3xx_spu_device::state_string_export(const device_state_entry &entry, std::string &str) const
{
m6502_device::state_string_export(entry, str);

switch(entry.index())
{
case VT3XX_SPU_DATABANK:
str = string_format("%02x", m_databank);
break;
}
}

#include "cpu/m6502/vt3xx_spu.hxx"
67 changes: 67 additions & 0 deletions src/devices/cpu/m6502/vt3xx_spu.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,67 @@
// license:BSD-3-Clause
// copyright-holders:David Haywood
/***************************************************************************

vt3xx_spu.h

***************************************************************************/
#ifndef MAME_CPU_M6502_VT3XX_SPU_H
#define MAME_CPU_M6502_VT3XX_SPU_H

#pragma once

#include "m6502.h"

class vt3xx_spu_device : public m6502_device {
public:
vt3xx_spu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);

virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;

#define O(o) void o ## _full(); void o ## _partial()

O(phx_vt_imp);
O(phy_vt_imp);
O(plx_vt_imp);
O(ply_vt_imp);

O(vtsetdbk_imp);
O(vtgetdbk_imp);

O(vtldabank_abx);
O(vtldabank2_zpy);
O(vtadcx_aba);

#undef O

protected:
uint8_t m_databank;

vt3xx_spu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);

virtual void device_start() override ATTR_COLD;
virtual void device_reset() override ATTR_COLD;
virtual void state_import(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;

// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;

address_space_config m_extdata_config;
address_space *m_extdata_space;

protected:
void set_databank(uint8_t bank);
uint8_t get_databank();
};

enum {
VT3XX_SPU_DATABANK = M6502_IR+1,
};


DECLARE_DEVICE_TYPE(VT3XX_SPU, vt3xx_spu_device)

#endif // MAME_CPU_M6502_VT3XX_SPU_H
15 changes: 15 additions & 0 deletions src/devices/cpu/m6502/vt3xx_spud.cpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,15 @@
// license:BSD-3-Clause
// copyright-holders:David Haywood
/***************************************************************************

vt3xx_spud.cpp

***************************************************************************/

#include "emu.h"
#include "vt3xx_spud.h"
#include "cpu/m6502/vt3xx_spud.hxx"

vt3xx_spu_disassembler::vt3xx_spu_disassembler() : m6502_base_disassembler(disasm_entries)
{
}
26 changes: 26 additions & 0 deletions src/devices/cpu/m6502/vt3xx_spud.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,26 @@
// license:BSD-3-Clause
// copyright-holders:David Haywood
/***************************************************************************

vt3xx_spud.h

***************************************************************************/

#ifndef MAME_CPU_M6502_VT3XX_SPUD_H
#define MAME_CPU_M6502_VT3XX_SPUD_H

#pragma once

#include "m6502d.h"

class vt3xx_spu_disassembler : public m6502_base_disassembler
{
public:
vt3xx_spu_disassembler();
virtual ~vt3xx_spu_disassembler() = default;

private:
static const disasm_entry disasm_entries[0x100];
};

#endif
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