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17 changes: 17 additions & 0 deletions core/arch/arm/plat-qcom/bruin/arch_config.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/

#ifndef ARCH_CONFIG_H
#define ARCH_CONFIG_H

#define GICD_BASE UL(0x0f200000)
#define GICR_BASE UL(0x0f260000)

#define IMEM_DIAG_OFFSET UL(0x720)
#define DIAG_SIZE UL(0x3000)
#define DIAG_BASE (IMEM_BASE + IMEM_SIZE - DIAG_SIZE)
#define DIAG_LOG_START_INFO (IMEM_BASE + IMEM_DIAG_OFFSET)

#endif /* ARCH_CONFIG_H */
11 changes: 11 additions & 0 deletions core/arch/arm/plat-qcom/bruin/qcom-arch.mk
Original file line number Diff line number Diff line change
@@ -0,0 +1,11 @@
# BRUIN architecture configuration

include core/arch/arm/cpu/cortex-armv8-0.mk
$(call force,CFG_TEE_CORE_NB_CORE,4)
$(call force,CFG_ARM_GICV3,y)

CFG_TZDRAM_START ?= 0xa1400000
CFG_TEE_RAM_VA_SIZE ?= 0x400000
CFG_TA_RAM_VA_SIZE ?= 0x2100000
CFG_TZDRAM_SIZE ?= (CFG_TEE_RAM_VA_SIZE + CFG_TA_RAM_VA_SIZE)
CFG_NUM_THREADS ?= 4
9 changes: 9 additions & 0 deletions core/arch/arm/plat-qcom/bruin/shikra/target.mk
Original file line number Diff line number Diff line change
@@ -0,0 +1,9 @@
CFG_DRIVERS_CLK ?= n
CFG_DRIVERS_QCOM_CLK ?= n
CFG_QCOM_QFPROM_FUSEPROV ?= n
CFG_QCOM_QFPROM ?= n
CFG_QCOM_CMD_DB ?= n
CFG_QCOM_RPMH_CLIENT ?= n
CFG_QCOM_PAS_PTA ?= n

CFG_QCOM_DIAG_LOG ?= $(CFG_TEE_CORE_DEBUG)

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Functional bug: enabling diag log on a platform that lacks TCSR_BOOT_MISC_DETECT breaks the debug build.

This enables CFG_QCOM_DIAG_LOG (defaulting to CFG_TEE_CORE_DEBUG), which compiles diag_log.c. That file uses TCSR_BOOT_MISC_DETECT at file scope (in register_phys_mem_pgdir(...)), but neither bruin/shikra/target_config.h nor bruin/arch_config.h defines it (only bobcat/hoya/cacao do). Debug builds for shikra fail to compile. Same issue for nord (wildcat/nord/target.mk, no define in wildcat/arch_config.h or wildcat/nord/target_config.h).

17 changes: 17 additions & 0 deletions core/arch/arm/plat-qcom/bruin/shikra/target_config.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/

#ifndef TARGET_CONFIG_H
#define TARGET_CONFIG_H

#define DRAM0_BASE UL(0x80000000)
#define DRAM0_SIZE UL(0x80000000)

#define GENI_UART_REG_BASE UL(0x04a80000)

#define IMEM_BASE UL(0x0c100000)
#define IMEM_SIZE UL(0x00020000)

#endif /* TARGET_CONFIG_H */
1 change: 1 addition & 0 deletions core/arch/arm/plat-qcom/bruin/sub.mk
Original file line number Diff line number Diff line change
@@ -0,0 +1 @@
# Placeholder for Qcom architecture specific makefile
3 changes: 3 additions & 0 deletions core/arch/arm/plat-qcom/conf.mk
Original file line number Diff line number Diff line change
Expand Up @@ -32,13 +32,16 @@ supported-ta-targets ?= ta_arm64
HOYA_ARCH_CHIPSETS := kodiak lemans
BOBCAT_ARCH_CHIPSETS := ipq96xx ipq52xx
WILDCAT_ARCH_CHIPSETS := nord cacao
BRUIN_ARCH_CHIPSETS := shikra

ifneq (,$(filter $(PLATFORM_FLAVOR),$(HOYA_ARCH_CHIPSETS)))
QCOM_ARCH_FAMILY := hoya
else ifneq (,$(filter $(PLATFORM_FLAVOR),$(BOBCAT_ARCH_CHIPSETS)))
QCOM_ARCH_FAMILY := bobcat
else ifneq (,$(filter $(PLATFORM_FLAVOR),$(WILDCAT_ARCH_CHIPSETS)))
QCOM_ARCH_FAMILY := wildcat
else ifneq (,$(filter $(PLATFORM_FLAVOR),$(BRUIN_ARCH_CHIPSETS)))
QCOM_ARCH_FAMILY := bruin
else
$(error Unsupported PLATFORM_FLAVOR: $(PLATFORM_FLAVOR))
endif
Expand Down
5 changes: 5 additions & 0 deletions core/arch/arm/plat-qcom/wildcat/arch_config.h
Original file line number Diff line number Diff line change
Expand Up @@ -6,4 +6,9 @@
#ifndef ARCH_CONFIG_H
#define ARCH_CONFIG_H

#define IMEM_DIAG_OFFSET UL(0x720)
#define DIAG_SIZE UL(0x3000)
#define DIAG_BASE (IMEM_BASE + IMEM_SIZE - DIAG_SIZE)
#define DIAG_LOG_START_INFO (IMEM_BASE + IMEM_DIAG_OFFSET)

#endif /* ARCH_CONFIG_H */
2 changes: 2 additions & 0 deletions core/arch/arm/plat-qcom/wildcat/cacao/target.mk
Original file line number Diff line number Diff line change
Expand Up @@ -11,3 +11,5 @@ $(call force,CFG_TEE_CORE_NB_CORE,8)
CFG_TZDRAM_START ?= 0x80fcd000
CFG_TEE_RAM_VA_SIZE ?= 0x147000
CFG_TA_RAM_VA_SIZE ?= 0x300000

CFG_QCOM_DIAG_LOG ?= $(CFG_TEE_CORE_DEBUG)
2 changes: 2 additions & 0 deletions core/arch/arm/plat-qcom/wildcat/nord/target.mk
Original file line number Diff line number Diff line change
Expand Up @@ -11,3 +11,5 @@ $(call force,CFG_TEE_CORE_NB_CORE,18)
CFG_TZDRAM_START ?= 0xBC280000
CFG_TEE_RAM_VA_SIZE ?= 0x00200000
CFG_TA_RAM_VA_SIZE ?= 0x07B80000

CFG_QCOM_DIAG_LOG ?= $(CFG_TEE_CORE_DEBUG)
4 changes: 4 additions & 0 deletions core/arch/arm/plat-qcom/wildcat/nord/target_config.h
Original file line number Diff line number Diff line change
Expand Up @@ -16,4 +16,8 @@
#define DRAM1_BASE ULL(0x800000000)
#define DRAM1_SIZE ULL(0x800000000)

/* IMEM and Diagnostic buffer */
#define IMEM_BASE UL(0x14680000)
#define IMEM_SIZE UL(0x19000)

#endif /* TARGET_CONFIG_H */