Refer mapping symbol into R_RISCV_RELAX for rvc/norvc relaxations.

Author: Nelson Chu

riscv-elf.adoc

@@ -929,6 +929,7 @@ below.
 
 +
 --
+[[EF_RISCV_RVC]]
   EF_RISCV_RVC (0x0001)::: This bit is set when the binary targets the C ABI,
   which allows instructions to be aligned to 16-bit boundaries (the base RV32
   and RV64 ISAs only allow 32-bit instruction alignment).  When linking
@@ -1174,7 +1175,7 @@ Description:: Additional information about the relocation
                                             <| S + A - P
 .2+| 46-50   .2+| *Reserved*    .2+| -       |                   .2+| Reserved for future standard use
                                             <|
-.2+| 51      .2+| RELAX         .2+| Static  |                   .2+| Instruction can be relaxed, paired with a normal relocation at the same address
+.2+| 51      .2+| RELAX         .2+| Static  |                   .2+| Instruction can be relaxed, paired with a normal relocation at the same address.  This relocation might point to an optional dummy mapping symbol, indicating which extension is permitted for use during the linker relaxation process.
                                             <|
 .2+| 52      .2+| SUB6          .2+| Static  | _word6_           .2+| Local label subtraction
                                             <| V - S - A
@@ -2734,6 +2735,38 @@ instructions. It is recommended to initialize `jvt` CSR immediately after
     csrw  jvt, a0
 ----
 
+=== Compressed and Non-compressed Relaxations in the Same Object
+
+The linker used to enable and disable the compressed relaxations by checking
+the <<EF_RISCV_RVC,EF_RISCV_RVC>> of each input object. Since
+<<EF_RISCV_RVC,EF_RISCV_RVC>> is an object-level tag, it cannot handle the case
+where `.option arch, +c` and `.option arch, -c` are in the same object.
+Therefore, encoding the mapping symbols into each `R_RISCV_RELAX` can resolve
+the problem.
+
+  Example::
++
+--
+Relaxation candidate:
+[,asm]
+----
+    .option arch, rv32i
+    auipc ra, 0          # R_RISCV_CALL_PLT (symbol), R_RISCV_RELAX ($xrv32i)
+    jalr  ra, ra, 0
+
+    .option arch, +c
+    auipc ra, 0          # R_RISCV_CALL_PLT (symbol), R_RISCV_RELAX ($xrv32ic)
+    jalr  ra, ra, 0
+----
+Relaxation result:
+[,asm]
+----
+    jal    ra, 0         # R_RISCV_JAL (symbol)
+
+    c.jal  ra, <offset-between-pc-and-symbol>
+----
+--
+
 [bibliography]
 == References