MIPS32 instructions & emulateme test

Implements most of the normal MIPS32 isa from MD00086 Rev 5.04
Does not implement Floating points and many special ops.

librz/arch/isa/mips/il/common.c

@@ -0,0 +1,28 @@
+// SPDX-FileCopyrightText: 2025 deroad <[email protected]>
+// SPDX-License-Identifier: LGPL-3.0-only
+
+#define MIPS_DWORD_SIZE 64
+#define MIPS_WORD_SIZE  32
+#define MIPS_HALF_SIZE  16
+#define MIPS_BYTE_SIZE  8
+
+#define REG_IS_ZERO(idx) mips_reg_is_zero(insn, idx)
+#define TRUNC32(x)       UNSIGNED(MIPS_WORD_SIZE, x)
+#define TRUNC16(x)       UNSIGNED(MIPS_HALF_SIZE, x)
+#define TRUNC8(x)        UNSIGNED(MIPS_BYTE_SIZE, x)
+
+static bool mips_reg_is_zero(cs_insn *insn, ut32 idx) {
+	const ut32 regid = REGID(idx);
+
+	return regid == MIPS_REG_ZERO ||
+		regid == MIPS_REG_ZERO_NM ||
+		regid == MIPS_REG_ZERO_64;
+}
+
+static RzILOpPure *mips_get_reg(csh *handle, cs_insn *insn, unsigned regid, size_t length) {
+	if (REG_IS_ZERO(regid)) {
+		return SN(length, 0);
+	}
+
+	return VARG_REG(regid);
+}