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riscv-rt: partial compatibility with RV32E Build check (riscv-peripheral) #317: Pull request #243 opened by romancardenas
November 9, 2024 09:19 3m 42s rv32e-compat-asm
rv32e-compat-asm
November 9, 2024 09:19 3m 42s
Merge pull request #236 from rust-embedded/clean_linker_file Build check (riscv-peripheral) #316: Commit fdc3bb6 pushed by github-merge-queue bot
November 8, 2024 17:20 3m 28s master
master
November 8, 2024 17:20 3m 28s
Build check (riscv-peripheral) Build check (riscv-peripheral) #315: Merge group checks requested
November 8, 2024 17:12 7m 4s
November 8, 2024 17:12 7m 4s
Build check (riscv-peripheral) Build check (riscv-peripheral) #314: Merge group checks requested
November 8, 2024 17:12 7m 10s
November 8, 2024 17:12 7m 10s
riscv: define mip using CSR macros Build check (riscv-peripheral) #313: Pull request #242 opened by rmsyn
November 8, 2024 03:02 3m 23s rmsyn:riscv/mip-csr-macro
rmsyn:riscv/mip-csr-macro
November 8, 2024 03:02 3m 23s
riscv: define mimpid using CSR macros Build check (riscv-peripheral) #312: Pull request #241 opened by rmsyn
November 8, 2024 02:23 3m 46s rmsyn:riscv/mimpid-csr-macro
rmsyn:riscv/mimpid-csr-macro
November 8, 2024 02:23 3m 46s
Merge pull request #240 from rmsyn/riscv/mie-csr-macro Build check (riscv-peripheral) #311: Commit 4605597 pushed by github-merge-queue bot
November 7, 2024 07:40 3m 46s master
master
November 7, 2024 07:40 3m 46s
Build check (riscv-peripheral) Build check (riscv-peripheral) #310: Merge group checks requested
November 7, 2024 07:37 3m 8s
November 7, 2024 07:37 3m 8s
Fix linker file for RISCV-64 targets Build check (riscv-peripheral) #309: Pull request #236 synchronize by romancardenas
November 6, 2024 14:18 3m 50s clean_linker_file
clean_linker_file
November 6, 2024 14:18 3m 50s
riscv: define mie using CSR macros Build check (riscv-peripheral) #308: Pull request #240 synchronize by rmsyn
November 5, 2024 19:59 4m 51s rmsyn:riscv/mie-csr-macro
rmsyn:riscv/mie-csr-macro
November 5, 2024 19:59 4m 51s
riscv: define mie using CSR macros Build check (riscv-peripheral) #307: Pull request #240 opened by rmsyn
November 5, 2024 19:56 3m 29s rmsyn:riscv/mie-csr-macro
rmsyn:riscv/mie-csr-macro
November 5, 2024 19:56 3m 29s
Fix linker file for RISCV-64 targets Build check (riscv-peripheral) #306: Pull request #236 synchronize by romancardenas
November 4, 2024 09:14 3m 13s clean_linker_file
clean_linker_file
November 4, 2024 09:14 3m 13s
Merge pull request #234 from rmsyn/riscv/mcounteren-csr-macro Build check (riscv-peripheral) #305: Commit 29dd75d pushed by github-merge-queue bot
November 4, 2024 08:28 3m 39s master
master
November 4, 2024 08:28 3m 39s
Build check (riscv-peripheral) Build check (riscv-peripheral) #304: Merge group checks requested
November 4, 2024 08:24 3m 22s
November 4, 2024 08:24 3m 22s
riscv: use CSR macros for mcounteren Build check (riscv-peripheral) #303: Pull request #234 synchronize by rmsyn
November 2, 2024 01:18 8m 54s rmsyn:riscv/mcounteren-csr-macro
rmsyn:riscv/mcounteren-csr-macro
November 2, 2024 01:18 8m 54s
Merge pull request #237 from rmsyn/riscv/mideleg-csr-macro Build check (riscv-peripheral) #302: Commit b7e9117 pushed by github-merge-queue bot
November 1, 2024 16:26 3m 32s master
master
November 1, 2024 16:26 3m 32s
Build check (riscv-peripheral) Build check (riscv-peripheral) #301: Merge group checks requested
November 1, 2024 16:23 3m 9s
November 1, 2024 16:23 3m 9s
Fix linker file for RISCV-64 targets Build check (riscv-peripheral) #300: Pull request #236 synchronize by romancardenas
November 1, 2024 14:36 3m 21s clean_linker_file
clean_linker_file
November 1, 2024 14:36 3m 21s
riscv: define mideleg using CSR macros Build check (riscv-peripheral) #299: Pull request #237 opened by rmsyn
October 31, 2024 03:57 3m 18s rmsyn:riscv/mideleg-csr-macro
rmsyn:riscv/mideleg-csr-macro
October 31, 2024 03:57 3m 18s
Fix linker file for RISCV-64 targets Build check (riscv-peripheral) #298: Pull request #236 opened by romancardenas
October 29, 2024 22:32 3m 28s clean_linker_file
clean_linker_file
October 29, 2024 22:32 3m 28s
Merge pull request #235 from rmsyn/riscv/medeleg-csr-macro Build check (riscv-peripheral) #297: Commit 275facc pushed by github-merge-queue bot
October 29, 2024 09:26 3m 32s master
master
October 29, 2024 09:26 3m 32s
Build check (riscv-peripheral) Build check (riscv-peripheral) #296: Merge group checks requested
October 29, 2024 09:22 3m 19s
October 29, 2024 09:22 3m 19s
riscv: define medeleg using CSR macros Build check (riscv-peripheral) #295: Pull request #235 synchronize by rmsyn
October 27, 2024 20:48 3m 10s rmsyn:riscv/medeleg-csr-macro
rmsyn:riscv/medeleg-csr-macro
October 27, 2024 20:48 3m 10s
riscv: define medeleg using CSR macros Build check (riscv-peripheral) #294: Pull request #235 opened by rmsyn
October 27, 2024 20:44 3m 23s rmsyn:riscv/medeleg-csr-macro
rmsyn:riscv/medeleg-csr-macro
October 27, 2024 20:44 3m 23s
Merge pull request #233 from rmsyn/riscv/mcause-csr-macro Build check (riscv-peripheral) #293: Commit b60a5a7 pushed by github-merge-queue bot
October 27, 2024 10:28 3m 30s master
master
October 27, 2024 10:28 3m 30s