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AHB-Lite Quad I/O SPI Flash memory controller with direct mapped cache and support for XiP

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shalan/MS_QSPI_XIP_CACHE

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MS_QSPI_XIP_CACHE

Quad I/O SPI Flash memory controller with support for:

  • AHB lite interface
  • Execute in Place (XiP)
  • Nx16 Direct-Mapped Cache (default: N=32).

Intended to be used with SoCs that have no on-chip flash memory.

Todo:

  • support for WB bus
  • Support cache configurations other than 16 bytes per line

Performance

The following data is obtained using Sky130 HD library

Configuration # of Cells (K) Delay (ns) Idyn (mA/MHz) Is (nA)
16x16 7.2 12 0.0625 20
32x16 14.3 17 0.126 39.5

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AHB-Lite Quad I/O SPI Flash memory controller with direct mapped cache and support for XiP

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