Issues

• [rtl] Incomplete serial-shifter sensitivity list can produce incorrect rotate/CPOP results in simulation

  stnolting/neorv32#1667 · Filter by author WowCorey opened on Oct 17, 2026

• [dma] Byte-to-word transfer writes the byte replicated (0x34343434) instead of zero-extended (0x00000034)

  stnolting/neorv32#1663 · Filter by author vera-rubin opened on Oct 9, 2026

• [slink] RX_FULL / TX_EMPTY / TX_NFULL interrupt enables are at bits 18/19/21 in the RTL but 17/18/19 in the datasheet and neorv32_slink.h

  stnolting/neorv32#1662 · Filter by author vera-rubin opened on Oct 9, 2026

• Potential loss of status in neorv32_twd_com_started/ended

  bug
  stnolting/neorv32#1652 · Filter by author ANicheMold opened on Sep 19, 2026
  1

• RFC: Implement Open-Source ASIL-D Automotive SoC Architecture and ISO 26262 VHDL Compliance Framework

  enhancement
  stnolting/neorv32#1639 · Filter by author Coastrnaut opened on Aug 29, 2026
  2

• GHDL errors out on VHDL files that don't have entity/architecture

  HWtroubleshooting
  stnolting/neorv32#1628 · Filter by author short-stuff88 opened on Aug 14, 2026
  3

  

• List of superlint warnings

  coding-styleHW
  stnolting/neorv32#1584 · Filter by author short-stuff88 opened on Jun 20, 2026
  10

• Show xcfu modul interface on the Vivado neorv32 ip block

  stnolting/neorv32#1563 · Filter by author riscSoft opened on May 30, 2026
  1