[TTL] Fuse DMA tile loops via pre-conversion grouping

[brnorris03]

What?

Restructure TTL-to-TTKernel lowering to emit setup ops before tile loops, enabling DMA tile loop fusion directly during conversion.

Why?

Previously, setup ops (tensor accessor creation, CB pointer retrieval) were emitted inline before each tile loop, blocking the FuseSiblingTileLoops pass from fusing adjacent loops. This change emits all setup ops first, then a single fused loop for copies with matching tile grids.

Pre-conversion grouping is more efficient than pattern-based lowering followed by post-hoc fusion. Setup ops are emitted once before the fused loop rather than inside each individual loop.

How?

• Add pre-conversion grouping in ConvertTTLToTTKernel.cpp that collects adjacent copy ops with matching tile grid bounds
• Emit fused loops directly during conversion (setup block → single tile loop with all DMAs)
• Recursively process nested regions (e.g., scf.for loop bodies)
• Partial fusion: When dominance fails mid-group, the code splits into subgroups and fuses what it can (e.g., 4 copies with CB bind in middle -> two fused loops instead of four separate loops).
• Remove fuse-tile-loops pipeline option (no longer needed)

How to Test?

llvm-lit -sv test/ttlang/Conversion/TTLToTTKernel/
llvm-lit -sv test/ttlang/Translate/TTLToCpp/

Checklist:

• Self-reviewed (style, logic)
• Added tests (or justified none needed)
• PR is small and focused (one task)

[zoecarver]

Thinking out loud: so the main motivator for the compute op is that we can fuse trivially, but these are datamovement so we can't use a compute op, so we do the fusing more manually? Is there any way we could abstract that further?

[zoecarver]

nit: duplicate definition

[zoecarver]

What if these alias?

    Lowered UNFUSED (correct):
  for tile in 0..4: noc_async_read_tile(tile, A, cb0)      // issue all reads
  for tile in 0..4: noc_async_write_tile(tile, cb0, B)    // issue all writes to DRAM
  for tile in 0..4: noc_async_read_tile(tile, B, cb1)     // issue all reads from DRAM
  noc_async_read_barrier()   // wait for loop 1
  noc_async_write_barrier()  // wait for loop 2 - ALL writes to B complete
  noc_async_read_barrier()   // wait for loop 3

  Lowered FUSED (loops 2+3 have same bounds):
  for tile in 0..4: noc_async_read_tile(tile, A, cb0)
  for tile in 0..4:
    noc_async_write_tile(tile, cb0, B)  // issue write to B[tile]
    noc_async_read_tile(tile, B, cb1)   // immediately read B[tile] - RACE!
                                         // write is async, hasn't landed yet
  noc_async_read_barrier()
  noc_async_write_barrier()
  noc_async_read_barrier()

[zoecarver]

Can you explain this change?

[brnorris03]

The ttl type is required to be able to figure out the direction.

[zoecarver]

Check not/check next to make sure this is actually deduplicated?

[brnorris03]

there are many -NOT checks in other tests... I don't think they need to be everywhere

[zoecarver]

LGTM! Thank you!