boards: arm: add can-module_com four CAN (FD) adapters

boards/can-module_com/canBridge_Oleksii_g473/Kconfig.canBridge_Oleksii_g473

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+
+config BOARD_CANBRIDGE_OLEKSII_G473
+	select SOC_STM32G473XX

boards/can-module_com/canBridge_Oleksii_g473/board.cmake

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+# Copyright (c) 2024 Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(openocd "--config=${BOARD_DIR}/support/openocd.cfg")
+
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

boards/can-module_com/canBridge_Oleksii_g473/board.yml

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+board:
+  name: canBridge_Oleksii_g473
+  full_name: USB CANFD TRIO
+  vendor: can-module.com
+  socs:
+    - name: stm32g473xx

boards/can-module_com/canBridge_Oleksii_g473/canBridge_Oleksii_g473.dts

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+
+/dts-v1/;
+#include <st/g4/stm32g473Xb.dtsi>
+#include <st/g4/stm32g473c(b-c-e)tx-pinctrl.dtsi>
+
+/ {
+	model = "CAN BRIDGE";
+	compatible = "canBridge_Oleksii,canBridge_Oleksii_g473";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,canbus = &fdcan1;
+	};
+
+	aliases {
+		led0 = &led_can1;
+		led1 = &led_can2;
+		led2 = &led_can3;
+		led3 = &led_stat;
+
+	};
+
+	leds: leds {
+		compatible = "gpio-leds";
+
+		led_can1: led_can1 {
+			gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
+			label = "LED_CAN1";
+		};
+
+		led_can2: led_can2 {
+			gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
+			label = "LED_CAN2";
+		};
+		led_can3: led_can3 {
+			gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>;
+			label = "LED_CAN3";
+		};
+
+		led_stat: led_stat {
+			gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
+			label = "LED_STAT";
+		};			
+	};
+};
+
+/*
+&clk_hsi {          // Internal 16 MHz clock used to drive PLL 
+	status = "okay";
+};
+*/
+
+&clk_hse {
+	clock-frequency = <DT_FREQ_M(8)>; /* HSE 8 Mhz */
+	status = "okay";
+};
+
+
+&clk_hsi48 {
+	/* Internal 48 MHz clock used to drive USB */
+	status = "okay";
+};
+
+/* Adjust the pll for a SYSTEM Clock of 160 MHz  */
+&pll {
+	div-m = <2>; // 4 16Mhz
+	mul-n = <80>;
+	div-p = <2>;
+	div-q = <4>;
+	div-r = <2>;
+	clocks = <&clk_hse>;//<&clk_hsi>
+	status = "okay";
+};
+
+&rcc {
+	clocks = <&pll>;
+	clock-frequency = <DT_FREQ_M(160)>;
+	ahb-prescaler = <1>;
+	apb1-prescaler = <1>;
+	apb2-prescaler = <1>;
+};
+
+stm32_lp_tick_source: &lptim1 {
+	clocks = <&rcc STM32_CLOCK(APB1, 31)>,
+		 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
+	status = "okay";
+};
+
+zephyr_udc0: &usb {
+	pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
+	pinctrl-names = "default";
+	clocks = <&rcc STM32_CLOCK(APB1, 23)>,
+		 <&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
+	status = "okay";
+};
+
+&fdcan1 {
+	pinctrl-0 = <&fdcan1_rx_pb8 &fdcan1_tx_pb9>;
+	pinctrl-names = "default";
+	clocks = <&rcc STM32_CLOCK(APB1, 25)>,
+		 <&rcc STM32_SRC_PLL_Q FDCAN_SEL(1)>;
+	status = "okay";
+};
+&fdcan2 {
+	pinctrl-0 = <&fdcan2_rx_pb5 &fdcan2_tx_pb6>;
+	pinctrl-names = "default";
+	clocks = <&rcc STM32_CLOCK(APB1, 25)>,
+		 <&rcc STM32_SRC_PLL_Q FDCAN_SEL(1)>;
+	status = "okay";
+};
+&fdcan3 {
+	pinctrl-0 = <&fdcan3_rx_pb3 &fdcan3_tx_pb4>;
+	pinctrl-names = "default";
+	clocks = <&rcc STM32_CLOCK(APB1, 25)>,
+		 <&rcc STM32_SRC_PLL_Q FDCAN_SEL(1)>;
+	status = "okay";
+};

boards/can-module_com/canBridge_Oleksii_g473/canBridge_Oleksii_g473.yaml

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+identifier: canBridge_Oleksii_g473
+name: USB CANFD TRIO
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+ram: 128
+flash: 128
+supported:
+  - can
+  - counter
+  - gpio
+  - usb_device
+  - usbd
+vendor: can-module.com

boards/can-module_com/canBridge_Oleksii_g473/canBridge_Oleksii_g473_defconfig

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+
+CONFIG_GPIO=y
+CONFIG_ARM_MPU=y

boards/can-module_com/canBridge_Oleksii_g473/doc/index.rst

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+.. zephyr:board:: canBridge_Oleksii_g473
+
+
+
+USB_CANFD_Bridge 
+######################
+
+CAN_Bridge  &  USBCANFD  3ch. up to 5 Mbps 
++ RS422 
+
+can-module.com
+
+.. figure:: img/CanBridge.png
+     :align: center
+     :alt:  CanBridge_3ch
+
+     CanBridge_3ch CANFD
+
+
+https://github.com/AlekseyMamontov/CANnectivity-CANFD-adapters
+
+
+
+Default Zephyr Peripheral Mapping:
+----------------------------------
+
+.. rst-class:: rst-columns
+
+- CAN_RX1: PB8
+- CAN_TX2: PB9
+- CAN_RX2: PB5
+- CAN_TX2: PB6- 
+  CAN_RX3: PB4
+- CAN_TX3: PB3
+
+- ledCAN1 : PC13
+- LedCAN2 : PB7
+- ledCAN3 : PA15
+- LedSTAT : PA5
+
+- USB_DN : PA11
+- USB_DP : PA12
+
+- RS422 TX : PA2
+- RS422 RX : PA3
+
+- SWDIO : PA13
+- SWCLK : PA14
+- NRST  : PG10
+
+System Clock
+------------
+The FDCAN1,FDCAN2,FDCAN3  peripheral is driven by PLLQ, which has 80 MHz frequency.
+
+
+.. _STM32G4 reference manual:
+   https://www.st.com/resource/en/reference_manual/rm0440-stm32g4-series-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
+
+.. _STM32CubeProgrammer:
+   https://www.st.com/en/development-tools/stm32cubeprog.html

boards/can-module_com/canBridge_Oleksii_g473/support/openocd.cfg

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+# Copyright (c) 2024 Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+source [find interface/stlink.cfg]
+source [find target/stm32g4x.cfg]

boards/can-module_com/usbcan_iso/Kconfig.usbcan_iso

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+# Copyright (c) 2024 Henrik Brix Andersen <henrik@brixandersen.dk>
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_USBCAN_ISO
+	select SOC_STM32F072XB

boards/can-module_com/usbcan_iso/board.cmake

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+# Copyright (c) 2024 Henrik Brix Andersen <henrik@brixandersen.dk>
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(dfu-util "--pid=0483:df11" "--alt=0" "--dfuse")
+board_runner_args(jlink "--device=STM32F072CB")
+
+include(${ZEPHYR_BASE}/boards/common/dfu-util.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/can-module_com/usbcan_iso/board.yml

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+board:
+  name: usbcan_iso
+  full_name: USBAN_Iso
+  vendor: can-module.com
+  socs:
+    - name: stm32f072xb

boards/can-module_com/usbcan_iso/doc/index.rst

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+.. zephyr:board:: usbcan
+
+Overview
+********
+
+The USBCAN isolated  is an open-source USB to CAN 2.0B adapter board. 
+********
+
+
+
+.. figure:: standart072.png
+     :align: center
+     :alt:  USBCAN 2.0
+
+       USBCAN 2.0
+
+
+
+The USBCAN board is equipped with a STM32F072CB microcontroller 
+
+Supported Features
+==================
+
+.. zephyr:board-supported-hw::
+
+System Clock
+============
+
+The STM32F072CB PLL is driven by an external crystal oscillator (HSE) running at 8 MHz and
+configured to provide a system clock of 48 MHz.
+
+Programming and Debugging
+*************************
+
+.. zephyr:board-supported-runners::
+
+Build and flash applications as usual (see :ref:`build_an_application` and
+:ref:`application_run` for more details).
+
+If flashing via USB DFU, short pins ``Boot0``  to the USBCAN board in
+order to enter the built-in DFU mode.
+
+Here is an example for the :zephyr:code-sample:`blinky` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/basic/blinky
+   :board: usbcan
+   :goals: flash
+
+.. _USBCAN iso website: can-module.com

boards/can-module_com/usbcan_iso/usbcan_iso.dts

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+/*
+ * Copyright (c) 2024 Henrik Brix Andersen <henrik@brixandersen.dk>
+ *
+ *  SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <st/f0/stm32f072Xb.dtsi>
+#include <st/f0/stm32f072c(8-b)tx-pinctrl.dtsi>
+
+/ {
+	model = "USBCAN board";
+	compatible = "usbcan,usbcan_iso";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,code-partition = &slot0_partition;
+		zephyr,canbus = &can1;
+	};
+
+	aliases {
+		led0 = &led_rx;
+		led1 = &led_tx;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_rx: led_rx {
+			gpios = <&gpiob 1 GPIO_ACTIVE_HIGH>;
+			label = "LED RX";
+		};
+
+		led_tx: led_tx {
+			gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
+			label = "LED TX";
+		};
+	};
+/**/
+};
+
+&clk_hse {
+	status = "okay";
+	clock-frequency = <DT_FREQ_M(8)>;
+};
+
+&pll {
+	prediv = <1>;
+	mul = <6>;
+	clocks = <&clk_hse>;
+	status = "okay";
+};
+
+&rcc {
+	clocks = <&pll>;
+	clock-frequency = <DT_FREQ_M(48)>;
+	ahb-prescaler = <1>;
+	apb1-prescaler = <1>;
+};
+
+zephyr_udc0: &usb {
+	pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&can1 {
+	pinctrl-0 = <&can_rx_pb8 &can_tx_pb9>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&flash0 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x00000000 DT_SIZE_K(48)>;
+			read-only;
+		};
+
+		slot0_partition: partition@c000 {
+			label = "image-0";
+			reg = <0x0000c000 DT_SIZE_K(80)>;
+		};
+	};
+};