sys/can: improve SJW calculation

[kfessel]

Contribution description

SJW was defaulting to 2 -> good for 8MHz time quanta bad for higher clock

With this PR:

• 2 is chosen as default if no max value is known
• Otherwise this ensures SJW is as big as allowed not bigger than either phase 1 phase 2 or its maximum value.

This should usually end up with SJW being the same as phase 2 for can configuration having the sample point at 87.5%) ->
it's starting at value of phase 2 making changes by the following comparisons unlikely.

Testing procedure

read

run can and see improved stability of connection for slightly drifting clocks on either end (less failed frames due to synchronization issues).

Issues/PRs references

http://www.oertel-halle.de/files/cia99paper.pdf might help under standing the sjw value

[riot-ci]

Murdock results

✔️ PASSED

a40a442 sys/can: bittiming calculation debug-result-print

Success	Failures	Total	Runtime
10509	0	10513	15m:57s

Artifacts

• Documentation preview

[DanielLockau-MLPA]

To facilitate validation for any reader, it would be valuable to have the CIA paper reference here as a comment.

[DanielLockau-MLPA]

SJW must not be bigger than phase segments 1 and 2. If a value is provided, not probing for phase segment 2 would leave the possibility that sjw is larger than segment 2.

if (!timing->sjw) {
    timing->sjw = timing->phase_seg2;
}
else {
    timing->sjw = MIN(timing->sjw, timing->phase_seg2);
}
timing->sjw = MIN(timing->sjw, timing->phase_seg1);
timing->sjw = MIN(timing->sjw, timing_const->sjw_max);