Fix test for tests/fmt/display_lm.v

YosysHQ · Jan 11, 2024 · 4946e7c · 4946e7c
1 parent d493225
commit 4946e7c
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diff --git a/tests/fmt/display_lm.v b/tests/fmt/display_lm.v
@@ -7,6 +7,5 @@ module mid ();
 endmodule
 
 module bot ();
-    initial $display("%%l: %l\n%%m: %m");
     always $display("%%l: %l\n%%m: %m");
 endmodule
diff --git a/tests/fmt/run-test.sh b/tests/fmt/run-test.sh
@@ -67,7 +67,7 @@ iverilog -o iverilog-always_full-1 yosys-always_full-1.v always_full_tb.v
 ./iverilog-always_full-1 |grep -v '\$finish called' >iverilog-always_full-1.log
 diff iverilog-always_full.log iverilog-always_full-1.log
 
-../../yosys -p "read_verilog display_lm.v" >yosys-display_lm.log
+../../yosys -p "read_verilog display_lm.v; hierarchy -auto-top; proc; sim" >yosys-display_lm.log
 ../../yosys -p "read_verilog display_lm.v; write_cxxrtl yosys-display_lm.cc"
 ${CC:-gcc} -std=c++11 -o yosys-display_lm_cc -I../../backends/cxxrtl/runtime display_lm_tb.cc -lstdc++
 ./yosys-display_lm_cc >yosys-display_lm_cc.log