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Bugfix/fix esp spi slave receive data #14420

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merged 1 commit into from
Oct 21, 2024
Merged

Bugfix/fix esp spi slave receive data #14420

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55 changes: 44 additions & 11 deletions arch/risc-v/src/common/espressif/esp_spi_slave.c
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Original file line number Diff line number Diff line change
Expand Up @@ -192,6 +192,7 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg);

static void spislave_evict_sent_data(struct spislave_priv_s *priv,
uint32_t sent_bytes);
static inline void spislave_hal_store_result(spi_slave_hal_context_t *hal);
#ifdef CONFIG_ESPRESSIF_SPI2_DMA
static void spislave_setup_rx_dma(struct spislave_priv_s *priv);
static void spislave_setup_tx_dma(struct spislave_priv_s *priv);
Expand Down Expand Up @@ -301,6 +302,41 @@ static struct esp_dmadesc_s dma_txdesc[SPI_DMA_DESC_NUM];
* Private Functions
****************************************************************************/

/****************************************************************************
* Name: spislave_hal_store_result
*
* Description:
* Get data from SPI peripheral driver and update local buffer. A similar
* function is present in the ESP HAL, but it seems there is an issue in
* the spi_ll_read_buffer(hal->hw, hal->rx_buffer, hal->rcv_bitlen) call.
* Therefore, we are developing our own function to handle this issue.
*
* NOTE: We have a similar function in the ESP HAL, but the
* spi_ll_read_buffer seems to be receiving the wrong parameter.
* This function will address the issue until the Espressif HAL is fixed.
*
* Input Parameters:
* hw - Beginning address of the HAL context register
*
* Returned Value:
* None.
*
****************************************************************************/

static inline void spislave_hal_store_result(spi_slave_hal_context_t *hal)
{
hal->rcv_bitlen = spi_ll_slave_get_rcv_bitlen(hal->hw);
if (hal->rcv_bitlen == hal->bitlen - 1)
{
hal->rcv_bitlen++;
}

if (!hal->use_dma && hal->rx_buffer)
{
spi_ll_read_buffer(hal->hw, hal->rx_buffer, hal->rcv_bitlen);
}
}

/****************************************************************************
* Name: spislave_cpu_tx_fifo_reset
*
Expand Down Expand Up @@ -563,9 +599,6 @@ static void spislave_prepare_next_tx(struct spislave_priv_s *priv)
static int spislave_periph_interrupt(int irq, void *context, void *arg)
{
struct spislave_priv_s *priv = (struct spislave_priv_s *)arg;

uint32_t transfer_size = spi_slave_hal_get_rcv_bitlen(&priv->ctx) / 8;

if (!priv->is_processing)
{
SPIS_DEV_SELECT(priv->dev, true);
Expand All @@ -574,12 +607,12 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)

/* RX process */

if (transfer_size > 0)
{
spi_slave_hal_store_result(&priv->ctx);
priv->rx_length += transfer_size;
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_RX_COMPLETE);
}
/* Point to the next free position in the buffer */

priv->ctx.rx_buffer += priv->rx_length;
spislave_hal_store_result(&priv->ctx);
priv->rx_length += priv->ctx.rcv_bitlen / priv->nbits;
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_RX_COMPLETE);

#ifdef CONFIG_ESPRESSIF_SPI2_DMA
if (priv->rx_length < SPI_SLAVE_BUFSIZE)
Expand All @@ -590,9 +623,9 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)

/* TX process */

if (transfer_size > 0 && priv->is_tx_enabled)
if (priv->ctx.rcv_bitlen > 0 && priv->is_tx_enabled)
{
spislave_evict_sent_data(priv, transfer_size);
spislave_evict_sent_data(priv, priv->ctx.rcv_bitlen / priv->nbits);
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_TX_COMPLETE);
}

Expand Down
62 changes: 62 additions & 0 deletions boards/risc-v/esp32c6/esp32c6-devkitm/configs/spislv/defconfig
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Original file line number Diff line number Diff line change
@@ -0,0 +1,62 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_SPI_EXCHANGE is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32c6-devkitc"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32C6_DEVKITC=y
CONFIG_ARCH_CHIP="esp32c6"
CONFIG_ARCH_CHIP_ESP32C6=y
CONFIG_ARCH_CHIP_ESP32C6WROOM1=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SPI=y
CONFIG_DEBUG_SPI_ERROR=y
CONFIG_DEBUG_SPI_INFO=y
CONFIG_DEBUG_SPI_WARN=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_ZERO=y
CONFIG_ESPRESSIF_ESP32C6=y
CONFIG_ESPRESSIF_SPI2=y
CONFIG_ESPRESSIF_SPI2_CSPIN=15
CONFIG_ESPRESSIF_SPI2_SLAVE=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_SPI_SLAVE=y
CONFIG_SPI_SLAVE_DRIVER=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART0_SERIAL_CONSOLE=y
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