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Merged
opsiff merged 37 commits into from
Dec 22, 2025
Merged

Support MilkV Titan and Backport PCIe, PLIC driver #1388

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e8e6b99
irqchip/sifive-plic: Use dev_xyz() in-place of pr_xyz()
avpatel Feb 22, 2024
832ce68
irqchip/sifive-plic: Use devm_xyz() for managed allocation
avpatel Feb 22, 2024
c410338
irqchip/sifive-plic: Use riscv_get_intc_hwnode() to get parent fwnode
avpatel Feb 22, 2024
ff4ec63
irqchip/sifive-plic: Cleanup PLIC contexts upon irqdomain creation fa…
avpatel Feb 22, 2024
6362aa2
irqchip/sifive-plic: Parse number of interrupts and contexts early in…
avpatel Feb 22, 2024
7f9afbd
irqchip/sifive-plic: Improve locking safety by using irqsave/irqrestore
avpatel Feb 22, 2024
0607467
irqchip/riscv-intc: Add support for RISC-V AIA
avpatel Feb 22, 2024
01f78e1
genirq/matrix: Dynamic bitmap allocation
bjorn-rivos Feb 22, 2024
588f144
irqchip/sifive-plic: Chain to parent IRQ after handlers are ready
SiFiveHolland May 29, 2024
e4744c5
irqchip/sifive-plic: Probe plic driver early for Allwinner D1 platform
avpatel Aug 20, 2024
3c25ceb
dts: dp1000: remove UR_DP1000_IOPAD macro and update UR_DP1000_BIAS
WangJia-UR Aug 25, 2025
cbdd597
docs: Update dp1000-pinctrl binding documentation for macro changes
WangJia-UR Aug 25, 2025
176cd23
style: pinctrl: ultrarisc: Format file according to kernel coding style
WangJia-UR Aug 25, 2025
3ccc07b
riscv: dp1000: plic: add plic early init supports
WangJia-UR Sep 18, 2025
a5c06e9
pcie: ultrarisc: Add suspend/resume support
Xincheng-Zhang-UR Oct 27, 2025
af9bbec
riscv: dp1000: dts: Move chosen node from common to board-specific DTS
WangJia-UR Nov 10, 2025
0ffb3e2
dts: riscv: ultrarisc: Refactor DP1000 device tree files
WangJia-UR Nov 11, 2025
ae1a848
riscv: pinctrl: ultrarisc: Implement pin configuration support
WangJia-UR Nov 12, 2025
aed5cf9
riscv: dts: dp1000: add dts/dtsi for Milk-V Titan board based on Ultr…
WangJia-UR Nov 18, 2025
8e11198
Revert "pcie:dw pcie rc interrupt affinity settings"
WangJia-UR Dec 19, 2025
0d9d26f
genirq/msi: Silence 'set affinity failed' warning
Jul 23, 2024
d58d0cb
PCI: aardvark: Silence 'set affinity failed' warning
Jul 23, 2024
aa6b260
PCI: altera-msi: Silence 'set affinity failed' warning
Jul 23, 2024
dfa8eb8
PCI: brcmstb: Silence 'set affinity failed' warning
Jul 23, 2024
acc8fdf
PCI: dwc: Silence 'set affinity failed' warning
Jul 23, 2024
e70c367
PCI: mediatek-gen3: Silence 'set affinity failed' warning
Jul 23, 2024
37fb8a3
PCI: mediatek: Silence 'set affinity failed' warning
Jul 23, 2024
4ee298f
PCI: mobiveil: Silence 'set affinity failed' warning
Jul 23, 2024
a96c06c
PCI: rcar-host: Silence 'set affinity failed' warning
Jul 23, 2024
963969a
PCI: tegra: Silence 'set affinity failed' warning
Jul 23, 2024
97445a2
PCI: vmd: Silence 'set affinity failed' warning
Jul 23, 2024
0b03a1a
PCI: xilinx-nwl: Silence 'set affinity failed' warning
Jul 23, 2024
3094a80
PCI: xilinx: Silence 'set affinity failed' warning
Jul 23, 2024
3cb2491
riscv: deepin_riscv64_desktop_defconfig: Enable KEYBOARD_GPIO
WangJia-UR Dec 19, 2025
eee673e
irqchip/sifive-plic: Return error code on failure
charlie-rivos Sep 3, 2024
508ba2f
irqchip/riscv-intc: Fix low-level interrupt handler setup for AIA
avpatel Feb 26, 2024
64663e6
irqchip/riscv-intc: Fix use of AIA interrupts 32-63 on riscv32
SiFiveHolland Mar 12, 2024
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36 changes: 18 additions & 18 deletions Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -4,21 +4,21 @@
$id: http://devicetree.org/schemas/pinctrl/ultrarisc,dp1000-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: UltraRisc DP1000 Pin Controller
title: UltraRISC DP1000 Pin Controller
maintainers:
- Jia Wang <[email protected]>

description: |
UltraRisc RISC-V SoC DP1000 pin controller.
UltraRISC RISC-V SoC DP1000 pin controller.
<dt-bindings/pinctrl/ur-dp1000-pinctrl.h> contains the pinmux definitions.

properties:
compatible:
const: ultrarisc,dp1000-pinctrl

reg:
maxItems: 1

pinctrl-single,register-width:
description:
The width of the register used to configure the pinmux.
Expand Down Expand Up @@ -52,16 +52,16 @@ patternProperties:
pinctrl-pins:
description:
The list of Pins and their mux settings that properties in the
node apply to. This should be set using the UR_DP1000_IOPAD
macros.
node apply to. The format: `PORT PIN FUNCTION`.
minItems: 1
maxItems: 32
items:
$ref: /schemas/types.yaml#/definitions/uint32
pinconf-pins:
description:
The list of Pins and their bias settings that properties in the
node apply to. This should be set using the UR_DP1000_BIAS macros.
node apply to. The format: `PORT PIN BIAS`.The BIAS should be
set using the UR_DP1000_BIAS macros.
minItems: 1
maxItems: 32
items:
Expand All @@ -81,25 +81,25 @@ examples:

i2c0_pins: i2c0_pins {
pinctrl-pins = <
UR_DP1000_IOPAD(UR_DP1000_IOMUX_A, 12, UR_FUNC0)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_A, 13, UR_FUNC0)
UR_DP1000_IOMUX_A 12 UR_FUNC0
UR_DP1000_IOMUX_A 13 UR_FUNC0
>;

pinconf-pins = <
UR_DP1000_BIAS(UR_DP1000_IOMUX_A, 12, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_A, 13, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_A 12 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_A 13 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
>;
};

i2c1_pins: i2c1_pins {
pinctrl-pins = <
UR_DP1000_IOPAD(UR_DP1000_IOMUX_B, 6, UR_FUNC0)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_B, 7, UR_FUNC0)
UR_DP1000_IOMUX_B 6 UR_FUNC0
UR_DP1000_IOMUX_B 7 UR_FUNC0
>;

pinconf-pins = <
UR_DP1000_BIAS(UR_DP1000_IOMUX_B, 6, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_B, 7, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_B 6 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_B 7 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
>;
};
};
};
2 changes: 1 addition & 1 deletion arch/riscv/boot/dts/ultrarisc/Makefile
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_ULTRARISC) += dp1000.dtb
dtb-$(CONFIG_ARCH_ULTRARISC) += dp1000-evb-v1.dtb
dtb-$(CONFIG_ARCH_ULTRARISC) += dp1000-mo-v1.dtb
dtb-$(CONFIG_ARCH_ULTRARISC) += dp1000-titan-v1.dtb
261 changes: 124 additions & 137 deletions arch/riscv/boot/dts/ultrarisc/dp1000-evb-pinctrl.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -4,143 +4,130 @@
*/

#include <dt-bindings/pinctrl/ur-dp1000-pinctrl.h>
#include "dp1000.dtsi"

&pmx0 {
i2c0_pins: i2c0_pins {
pinctrl-pins = <
UR_DP1000_IOMUX_A 12 UR_FUNC0
UR_DP1000_IOMUX_A 13 UR_FUNC0
>;

pinconf-pins = <
UR_DP1000_IOMUX_A 12 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_A 13 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
>;
};

i2c1_pins: i2c1_pins {
pinctrl-pins = <
UR_DP1000_IOMUX_B 6 UR_FUNC0
UR_DP1000_IOMUX_B 7 UR_FUNC0
>;

pinconf-pins = <
UR_DP1000_IOMUX_B 6 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_B 7 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
>;
};

i2c2_pins: i2c2_pins {
pinctrl-pins = <
UR_DP1000_IOMUX_C 0 UR_FUNC0
UR_DP1000_IOMUX_C 1 UR_FUNC0
>;

pinconf-pins = <
UR_DP1000_IOMUX_C 0 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_C 1 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
>;
};

i2c3_pins: i2c3_pins {
pinctrl-pins = <
UR_DP1000_IOMUX_C 2 UR_FUNC0
UR_DP1000_IOMUX_C 3 UR_FUNC0
>;

pinconf-pins = <
UR_DP1000_IOMUX_C 2 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_C 3 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
>;
};

uart0_pins: uart0_pins {
pinctrl-pins = <
UR_DP1000_IOMUX_A 8 UR_FUNC1
UR_DP1000_IOMUX_A 9 UR_FUNC1
>;

pinconf-pins = <
UR_DP1000_IOMUX_A 8 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_A 9 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
>;
};

uart1_pins: uart1_pins {
pinctrl-pins = <
UR_DP1000_IOMUX_B 4 UR_FUNC0
UR_DP1000_IOMUX_B 5 UR_FUNC0
>;

pinconf-pins = <
UR_DP1000_IOMUX_B 4 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_B 5 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
>;
};

uart2_pins: uart2_pins {
pinctrl-pins = <
UR_DP1000_IOMUX_C 4 UR_FUNC0
UR_DP1000_IOMUX_C 5 UR_FUNC0
>;

pinconf-pins = <
UR_DP1000_IOMUX_C 4 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_C 5 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
>;
};

spi0_pins: spi0_pins {
pinctrl-pins = <
UR_DP1000_IOMUX_D 0 UR_FUNC1
UR_DP1000_IOMUX_D 1 UR_FUNC1
UR_DP1000_IOMUX_D 2 UR_FUNC1
UR_DP1000_IOMUX_D 3 UR_FUNC1
UR_DP1000_IOMUX_D 4 UR_FUNC1
UR_DP1000_IOMUX_D 5 UR_FUNC1
UR_DP1000_IOMUX_D 6 UR_FUNC1
UR_DP1000_IOMUX_D 7 UR_FUNC1
>;

pinconf-pins = <
UR_DP1000_IOMUX_D 0 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_D 1 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_D 2 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_D 3 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_D 4 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_D 5 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_D 6 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_D 7 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
>;
};

/ {

soc {
pmx0: pinmux@11081000 {
compatible = "ultrarisc,dp1000-pinctrl";
reg = <0x0 0x11081000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
#pinctrl-cells = <2>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x3ff>;
pinctrl-use-default;

i2c0_pins: i2c0_pins {
pinctrl-pins = <
UR_DP1000_IOPAD(UR_DP1000_IOMUX_A, 12, UR_FUNC0)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_A, 13, UR_FUNC0)
>;

pinconf-pins = <
UR_DP1000_BIAS(UR_DP1000_IOMUX_A, 12, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_A, 13, UR_PULL_UP, UR_DRIVE_DEF)
>;
};

i2c1_pins: i2c1_pins {
pinctrl-pins = <
UR_DP1000_IOPAD(UR_DP1000_IOMUX_B, 6, UR_FUNC0)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_B, 7, UR_FUNC0)
>;

pinconf-pins = <
UR_DP1000_BIAS(UR_DP1000_IOMUX_B, 6, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_B, 7, UR_PULL_UP, UR_DRIVE_DEF)
>;
};

i2c2_pins: i2c2_pins {
pinctrl-pins = <
UR_DP1000_IOPAD(UR_DP1000_IOMUX_C, 0, UR_FUNC0)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_C, 1, UR_FUNC0)
>;

pinconf-pins = <
UR_DP1000_BIAS(UR_DP1000_IOMUX_C, 0, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_C, 1, UR_PULL_UP, UR_DRIVE_DEF)
>;
};

i2c3_pins: i2c3_pins {
pinctrl-pins = <
UR_DP1000_IOPAD(UR_DP1000_IOMUX_C, 2, UR_FUNC0)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_C, 3, UR_FUNC0)
>;

pinconf-pins = <
UR_DP1000_BIAS(UR_DP1000_IOMUX_C, 2, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_C, 3, UR_PULL_UP, UR_DRIVE_DEF)
>;
};

uart0_pins: uart0_pins {
pinctrl-pins = <
UR_DP1000_IOPAD(UR_DP1000_IOMUX_A, 8, UR_FUNC1)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_A, 9, UR_FUNC1)
>;

pinconf-pins = <
UR_DP1000_BIAS(UR_DP1000_IOMUX_A, 8, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_A, 9, UR_PULL_UP, UR_DRIVE_DEF)
>;
};

uart1_pins: uart1_pins {
pinctrl-pins = <
UR_DP1000_IOPAD(UR_DP1000_IOMUX_B, 4, UR_FUNC0)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_B, 5, UR_FUNC0)
>;

pinconf-pins = <
UR_DP1000_BIAS(UR_DP1000_IOMUX_B, 4, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_B, 5, UR_PULL_UP, UR_DRIVE_DEF)
>;
};

uart2_pins: uart2_pins {
pinctrl-pins = <
UR_DP1000_IOPAD(UR_DP1000_IOMUX_C, 4, UR_FUNC0)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_C, 5, UR_FUNC0)
>;

pinconf-pins = <
UR_DP1000_BIAS(UR_DP1000_IOMUX_C, 4, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_C, 5, UR_PULL_UP, UR_DRIVE_DEF)
>;
};

spi0_pins: spi0_pins {
pinctrl-pins = <
UR_DP1000_IOPAD(UR_DP1000_IOMUX_D, 0, UR_FUNC1)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_D, 1, UR_FUNC1)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_D, 2, UR_FUNC1)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_D, 3, UR_FUNC1)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_D, 4, UR_FUNC1)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_D, 5, UR_FUNC1)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_D, 6, UR_FUNC1)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_D, 7, UR_FUNC1)
>;

pinconf-pins = <
UR_DP1000_BIAS(UR_DP1000_IOMUX_D, 0, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_D, 1, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_D, 2, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_D, 3, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_D, 4, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_D, 5, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_D, 6, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_D, 7, UR_PULL_UP, UR_DRIVE_DEF)
>;
};

spi1_pins: spi1_pins {
pinctrl-pins = <
UR_DP1000_IOPAD(UR_DP1000_IOMUX_A, 0, UR_FUNC0)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_A, 1, UR_FUNC0)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_A, 2, UR_FUNC0)
UR_DP1000_IOPAD(UR_DP1000_IOMUX_A, 3, UR_FUNC0)
>;

pinconf-pins = <
UR_DP1000_BIAS(UR_DP1000_IOMUX_A, 0, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_A, 1, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_A, 2, UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_BIAS(UR_DP1000_IOMUX_A, 3, UR_PULL_UP, UR_DRIVE_DEF)
>;
};
};
spi1_pins: spi1_pins {
pinctrl-pins = <
UR_DP1000_IOMUX_A 0 UR_FUNC0
UR_DP1000_IOMUX_A 1 UR_FUNC0
UR_DP1000_IOMUX_A 2 UR_FUNC0
UR_DP1000_IOMUX_A 3 UR_FUNC0
>;

pinconf-pins = <
UR_DP1000_IOMUX_A 0 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_A 1 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_A 2 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
UR_DP1000_IOMUX_A 3 UR_DP1000_BIAS(UR_PULL_UP, UR_DRIVE_DEF)
>;
};
};
8 changes: 7 additions & 1 deletion arch/riscv/boot/dts/ultrarisc/dp1000-evb-v1.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -3,10 +3,16 @@
* Copyright(C) 2025 UltraRISC Technology (Shanghai) Co., Ltd.
*/

#include "dp1000.dts"
#include "dp1000-evb-pinctrl.dtsi"
#include <dt-bindings/iio/temperature/thermocouple.h>

/ {
chosen {
bootargs = "earlycon=sbi console=ttyS1,115200";
stdout-path = &uart1;
};
};

&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
Expand Down
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