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N6 IC Selection Fix#5383

Merged
xoviat merged 5 commits intoembassy-rs:mainfrom
turnaroundfactor:n6-pll34
Feb 4, 2026
Merged

N6 IC Selection Fix#5383
xoviat merged 5 commits intoembassy-rs:mainfrom
turnaroundfactor:n6-pll34

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@jake-taf jake-taf commented Feb 4, 2026

The CPU/SYS clocks from init_clocks has a bug due to a incorrect enum generation, causing HSI clocks to be used instead of PLL 3/4

`rcc_n6.rs generated from stm32-data incorrectly uses the following for IC selection:

pub enum Icsel {
    #[doc = "pll1_ck is selected (default after reset)."]
    PLL1 = 0x0,
    #[doc = "pll2_ck is selected."]
    PLL2 = 0x01,
    #[doc = "hsi_ck = hsi_osc_ck / 4."]
    HSI_OSC_DIV4 = 0x02,
    #[doc = "hsi_ck = hsi_osc_ck / 8."]
    HSI_OSC_DIV8 = 0x03,
}

when it should be this (default is different for different IC, so the doc was also misleading).

pub enum Icsel {
    #[doc = "pll1_ck is selected."]
    PLL1 = 0x0,
    #[doc = "pll2_ck is selected."]
    PLL2 = 0x01,
    #[doc = "pll3_ck is selected."]
    PLL3 = 0x02,
    #[doc = "pll4_ck is selected."]
    PLL3 = 0x03,
}

Caution

This relies on another PR to work, so those must be merged around the same time
This issue is fixed in embassy-rs/stm32-data#727

Division was actually fine
@jake-taf jake-taf marked this pull request as ready for review February 4, 2026 21:17
@xoviat xoviat added this pull request to the merge queue Feb 4, 2026
Merged via the queue into embassy-rs:main with commit b04101d Feb 4, 2026
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2 participants