[firtool] fix: remove unused modules before infering resets

The Chisel's Definition API generates modules that are not instantiated,
whose reset cannot be inferred properly. Remove them before InferResets
pass to resolve it.

Signed-off-by: unlsycn <[email protected]>

lib/Firtool/Firtool.cpp

@@ -81,8 +81,6 @@ LogicalResult firtool::populateCHIRRTLToLowFIRRTL(mlir::PassManager &pm,
       firrtl::createMemToRegOfVecPass(opt.shouldReplicateSequentialMemories(),
                                       opt.shouldIgnoreReadEnableMemories()));
 
-  pm.nest<firrtl::CircuitOp>().addPass(firrtl::createInferResetsPass());
-
   if (opt.shouldExportChiselInterface()) {
     StringRef outdir = opt.getChiselInterfaceOutputDirectory();
     if (opt.isDefaultOutputFilename() && outdir.empty()) {
@@ -138,6 +136,8 @@ LogicalResult firtool::populateCHIRRTLToLowFIRRTL(mlir::PassManager &pm,
 
   pm.nest<firrtl::CircuitOp>().addPass(firrtl::createInlinerPass());
 
+  pm.nest<firrtl::CircuitOp>().addPass(firrtl::createInferResetsPass());
+
   // Preset the random initialization parameters for each module. The current
   // implementation assumes it can run at a time where every register is
   // currently in the final module it will be emitted in, all registers have

test/firtool/definition-infer-resets-error.fir

@@ -0,0 +1,28 @@
+; RUN: firtool %s --verify-diagnostics --split-input-file
+
+FIRRTL version 3.3.0
+circuit Foo:
+  module Adder :
+    input clock : Clock
+    input reset : Reset
+    input in : UInt<10>
+    output out : UInt<10>
+
+    node _out_T = add(in, UInt<1>(0h1))
+    node _out_T_1 = tail(_out_T, 1)
+    connect out, _out_T_1
+
+  ; expected-warning @below {{module `Foo` is empty}}
+  module Foo :
+    input clock : Clock
+    input reset : UInt<1>
+
+;// -----
+
+FIRRTL version 3.3.0
+circuit Bar:
+    ; expected-note @below {{the module with this uninferred reset port was defined here}}
+  module Bar :
+    input clock : Clock
+    ; expected-error @below {{a port "reset" with abstract reset type was unable to be inferred by InferResets}}
+    input reset : Reset