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This repository was archived by the owner on Jul 17, 2026. It is now read-only.

Add riscv as a zephyr target - #1315

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jdavidberger wants to merge 1 commit into
riscv-collab:riscvfrom
jdavidberger:riscv
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Add riscv as a zephyr target#1315
jdavidberger wants to merge 1 commit into
riscv-collab:riscvfrom
jdavidberger:riscv

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@jdavidberger

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I'm working on a FPGA based SOC that uses zephyr and this snippet is required to enable thread / other zephyr OS support for riscv targets

@JanMatCodasip

JanMatCodasip commented Jun 9, 2026

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Hi @jdavidberger, thanks for your PR.

As this repository is stale and probably going to be archived, you may want to submit your change into the upstream OpenOCD instead: review.openocd.org.

Few hints, in case you do:

  • Hint 1: Your PR will have higher chance of acceptance in the upstream if you describe the steps how your change can be tested. This way reviewers will have a chance of re-testing your changes. E.g. what platform to use (a specific board board? spike simulator?), how to build a simple Zephyr-based program, ...

  • Hint 2: There are some trivial whitespace issues (mixture of spaces and tabs).

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