Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Fix fontifying of variable names and overriding of keywords. #1787

Merged
merged 1 commit into from
Jul 15, 2022
Merged
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 2 additions & 2 deletions verilog-mode.el
Original file line number Diff line number Diff line change
Expand Up @@ -3396,7 +3396,7 @@ See also `verilog-font-lock-extra-types'.")
(verilog-single-declaration-end verilog-highlight-max-lookahead)
(point)) ;; => current declaration statement is of 0 length
nil ;; Post-form: nothing to be done
'(0 font-lock-variable-name-face t t)))
'(0 font-lock-variable-name-face nil t)))
)))


Expand Down Expand Up @@ -3714,7 +3714,7 @@ obtained using `verilog-single-declaration-end'."
(verilog-forward-ws&directives limit)
(setq old-point nil)
(while (and (< (point) limit)
(not (member (char-after) '(?, ?\) ?\;)))
(not (member (char-after) '(?, ?\) ?\] ?\} ?\;)))
(not (eq old-point (point))))
(setq old-point (point))
(verilog-forward-ws&directives limit)
Expand Down