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@kroening kroening marked this pull request as ready for review August 10, 2024 14:47
@kroening kroening changed the title Verilog: test for reduction operators Verilog: constant folding for reduction operators Aug 13, 2024
Comment on lines +1548 to +1563
auto make_all_ones = [](const typet &type) -> exprt
{
if(type.id() == ID_unsignedbv)
{
return from_integer(
power(2, to_unsignedbv_type(type).get_width()) - 1, type);
}
else if(type.id() == ID_signedbv)
{
return from_integer(-1, type);
}
else if(type.id() == ID_bool)
return true_exprt{};
else
PRECONDITION(false);
};
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Wouldn't bv_typet::all_ones_expr do the trick?

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Not sure if the simplifier can cast that? Will check.

@kroening kroening merged commit bbdb0b1 into main Aug 17, 2024
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@kroening kroening deleted the reduction1 branch August 17, 2024 19:17
Romy15200 pushed a commit to Romy15200/nws that referenced this pull request Aug 19, 2025
Verilog: constant folding for reduction operators
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2 participants