Add Supervisor Domains extension and CSRs

csrs.csv

@@ -325,3 +325,12 @@
 0xF14, "mhartid"
 0xF15, "mconfigptr"
 0xFB0, "mtopi"
+0x382, "mmpt"
+0x74E, "msdcfg"
+0x381, "mrmcfg"
+0x781, "mnrmcfg"
+0xF4F, "msideip"
+0xF5F, "msideiph"
+0x74F, "msideie"
+0x75F, "msideieh"
+0x74D, "mgeien"

encoding.h

@@ -154,17 +154,34 @@
 #define MIP_MEIP            (1 << IRQ_M_EXT)
 #define MIP_SGEIP           (1 << IRQ_S_GEXT)
 #define MIP_LCOFIP          (1 << IRQ_LCOF)
+#define MIP_MSDEIP          (1 << IRQ_MSDEI)
 #define MIP_RAS_LOW_PRIO    (1ULL << IRQ_RAS_LOW_PRIO)
 #define MIP_RAS_HIGH_PRIO   (1ULL << IRQ_RAS_HIGH_PRIO)
 
 #define MIP_S_MASK          (MIP_SSIP | MIP_STIP | MIP_SEIP)
 #define MIP_VS_MASK         (MIP_VSSIP | MIP_VSTIP | MIP_VSEIP)
 #define MIP_HS_MASK         (MIP_VS_MASK | MIP_SGEIP)
 
+#define MIE_SSIE            (1 << IRQ_S_SOFT)
+#define MIE_VSSIE           (1 << IRQ_VS_SOFT)
+#define MIE_MSIE            (1 << IRQ_M_SOFT)
+#define MIE_STIE            (1 << IRQ_S_TIMER)
+#define MIE_VSTIE           (1 << IRQ_VS_TIMER)
+#define MIE_MTIE            (1 << IRQ_M_TIMER)
+#define MIE_SEIE            (1 << IRQ_S_EXT)
+#define MIE_VSEIE           (1 << IRQ_VS_EXT)
+#define MIE_MEIE            (1 << IRQ_M_EXT)
+#define MIE_SGEIE           (1 << IRQ_S_GEXT)
+#define MIE_LCOFIE          (1 << IRQ_LCOF)
+#define MIE_MSDEIE          (1 << IRQ_MSDEI)
+
 #define MIDELEG_FORCED_MASK MIP_HS_MASK
 
 #define SIP_SSIP MIP_SSIP
 #define SIP_STIP MIP_STIP
+#define SIP_MSDEIP MIP_MSDEIP
+
+#define SIE_MSDEIE MIE_MSDEIE
 
 #define MENVCFG_FIOM  0x00000001
 #define MENVCFG_LPE   0x00000004
@@ -458,6 +475,114 @@
 #define SCTR_DATA_CCV       0x0000000000008000
 #define SCTR_DATA_CC        0x00000000FFFF0000
 
+/*supervisor domain CSR fields*/
+#define MPTP32_MODE 0xC0000000
+#define MPTP32_SDID 0x0FC00000
+#define MPTP32_PPN  0x003FFFFF
+
+#define MPTP64_MODE 0xF000000000000000
+#define MPTP64_SDID 0x03F0000000000000
+#define MPTP64_PPN  0x00000FFFFFFFFFFF
+
+#define MPTP32_MODE_BARE     0
+#define MPTP32_MODE_SMMPT34  1
+#define MPTP32_MODE_RESERVED 2
+#define MPTP32_MODE_CUSTOM   3
+
+#define MPTP64_MODE_BARE      0
+#define MPTP64_MODE_SMMPT43   1
+#define MPTP64_MODE_SMMPT52   2
+#define MPTP64_MODE_SMMPT64   3
+#define MPTP64_MODE_RESERVED0 4
+#define MPTP64_MODE_RESERVED1 5
+#define MPTP64_MODE_RESERVED2 6
+#define MPTP64_MODE_RESERVED3 7
+#define MPTP64_MODE_RESERVED4 8
+#define MPTP64_MODE_RESERVED5 9
+#define MPTP64_MODE_RESERVED6 10
+#define MPTP64_MODE_RESERVED7 11
+#define MPTP64_MODE_RESERVED8 12
+#define MPTP64_MODE_RESERVED9 13
+#define MPTP64_MODE_CUSTOM0   14
+#define MPTP64_MODE_CUSTOM1   15
+
+#define MSDCFG_SIDN 0x0000003F
+#define MSDCFG_SEDA 0x00000040
+#define MSDCFG_SETA 0x00000080
+#define MSDCFG_SSRM 0x00400000
+#define MSDCFG_SSMM 0x00800000
+#define MSDCFG_SRL  0x0F000000
+#define MSDCFG_SML  0xF0000000
+
+#define MSIDEIP_INTERRUPT_0_63   0xFFFFFFFFFFFFFFFF
+#define MSIDEIPH_INTERRUPT_32_63 0xFFFFFFFF
+
+#define MSIDEIE_INTERRUPT_0_63   0xFFFFFFFFFFFFFFFF
+#define MSIDEIEH_INTERRUPT_32_63 0xFFFFFFFF
+
+#define MGEIEN32_ACCUMULATE 0x00000001
+#define MGEIEN32_GIF_BV     0xFFFFFFFE
+
+#define MGEIEN64_ACCUMULATE 0x0000000000000001
+#define MGEIEN64_GIF_BV     0xFFFFFFFFFFFFFFFE
+
+#define MRMCFG32_RCID 0x00000FFF
+#define MRMCFG32_MCID 0x0FFF0000
+#define MRMCFG32_QRID 0xF0000000
+
+#define MRMCFG64_RCID 0x0000000000000FFF
+#define MRMCFG64_MCID 0x000000000FFF0000
+#define MRMCFG64_QRID 0x00000000F0000000
+
+#define MNRMCFG32_RCID 0x00000FFF
+#define MNRMCFG32_MCID 0x0FFF0000
+#define MNRMCFG32_QRID 0xF0000000
+
+#define MNRMCFG64_RCID 0x0000000000000FFF
+#define MNRMCFG64_MCID 0x000000000FFF0000
+#define MNRMCFG64_QRID 0x00000000F0000000
+
+/* MPTE fields */
+#define MPTE_V               0x00000001 /* MPTE Valid field */
+#define MPTE_L               0x00000002 /* MPTE Leaf field */
+#define MPTE_LEAF_N          0x00000004 /* MPTE Leaf NAPOT field */
+#define MPTE_NONLEAF_RSVD    0x000003FC /* Reserved for future */
+#define MPTE_LEAF_RSVD       0x000000F8 /* Reserved for future */
+
+#define MPTE_PPN_SHIFT  10
+
+/* Smmpt[34, 43, 52, 64] non-NAPOT leaf perms */
+#define MPTE_LEAF_XWR0  0x00000700
+#define MPTE_LEAF_XWR1  0x00003800
+#define MPTE_LEAF_XWR2  0x0001C000
+#define MPTE_LEAF_XWR3  0x000E0000
+#define MPTE_LEAF_XWR4  0x00700000
+#define MPTE_LEAF_XWR5  0x03800000
+#define MPTE_LEAF_XWR6  0x1C000000
+#define MPTE_LEAF_XWR7  0xE0000000
+/* Smmpt[43, 52, 64] non-NAPOT leaf perms */
+#define MPTE_LEAF_XWR8   0x0000000700000000
+#define MPTE_LEAF_XWR9   0x0000003800000000
+#define MPTE_LEAF_XWR10  0x000001C000000000
+#define MPTE_LEAF_XWR11  0x00000E0000000000
+#define MPTE_LEAF_XWR12  0x0000700000000000
+#define MPTE_LEAF_XWR13  0x0003800000000000
+#define MPTE_LEAF_XWR14  0x001C000000000000
+#define MPTE_LEAF_XWR15  0x00E0000000000000
+
+/* Smmpt[34, 43, 52, 64] NAPOT leaf */
+#define MPTE_NAPOT_LEAF_XWR   0x00000700
+#define MPTE_NAPOT_LEAF_RSVD2 0x00000800 /* Reserved for future */
+#define MPTE_NAPOT_LEAF_G     0x0000F000
+#define MPTE_NAPOT_LEAF_RSVD3 0xFFFF0000 /* Reserved for future */
+/* Smmpt[43, 52, 64] NAPOT leaf */
+#define MPTE_NAPOT_LEAF_RSVD4 0xFFFFFFFF00000000 /* Reserved for future */
+
+/* Smmpt[34, 43, 52, 64] NAPOT leaf valid G encodings */
+#define MPTE32_NAPOT_LEAF_G_ENC 0x00006000
+#define MPTE64_NAPOT_LEAF_G_ENC 0x00004000
+/*end - supervisor domain CSR fields*/
+
 #define IRQ_U_SOFT        0
 #define IRQ_S_SOFT        1
 #define IRQ_VS_SOFT       2
@@ -473,6 +598,7 @@
 #define IRQ_S_GEXT        12
 #define IRQ_COP           12
 #define IRQ_LCOF          13
+#define IRQ_MSDEI         14
 #define IRQ_RAS_LOW_PRIO  35
 #define IRQ_RAS_HIGH_PRIO 43
 

extensions/unratified/rv_smsdid

@@ -0,0 +1,2 @@
+mfence.pa 11..7=0 rs1 rs2 31..25=0x19 14..12=0 6..2=0x1C 1..0=3
+minval.pa 11..7=0 rs1 rs2 31..25=0x1b 14..12=0 6..2=0x1C 1..0=3