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Pull requests: chipsalliance/caliptra-rtl

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Pull requests list

Crypto enhancement
#594 opened Sep 18, 2024 by mojtaba-bisheh Loading…
1
@mojtaba-bisheh
1
[RTL] Convert APB interfaces to AXI and add DMA 2.0 feature request enhancement New feature or request
#590 opened Sep 11, 2024 by calebofearth Loading…
2
1
Add coverage report
#587 opened Sep 10, 2024 by kiryk Loading…
2
Integration doc - use RTL signal names
#570 opened Aug 14, 2024 by steven-bellock Loading…
4
Integration docs: Add recommended TRNG self-test thresholds.
#569 opened Aug 13, 2024 by korran Loading…
Add test for JTAG during uC reset
#554 opened Jul 4, 2024 by robertszczepanski Loading…
Patch 1.0 RTL with Lint Fixes enhancement New feature or request
#518 opened May 17, 2024 by calebofearth Loading…
@calebofearth
8
libs: ahb_slv_sif: Latch hsize on address phase Future
#502 opened Apr 17, 2024 by wkkuna Loading…
2
Fix PC setup after waking from clock gating in Verilator Future
#380 opened Jan 16, 2024 by robertszczepanski Loading…
12
[RDL] Minor tweak to reg description documentation Improvements or additions to documentation Future
#370 opened Jan 4, 2024 by calebofearth Loading…
@calebofearth
5
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